https://gcc.gnu.org/g:b7f5d9114801716924a67ea393f0c30ab793e505
commit r15-7890-gb7f5d9114801716924a67ea393f0c30ab793e505
Author: Richard Earnshaw <rearn...@arm.com>
Date: Tue Mar 4 16:17:32 2025 +0000
arm: testsuite: improve guard checks for arm_neon.h
The header file arm_neon.h provides the Advanced SIMD intrinsics that
are available on armv7 or later A & R profile cores. However, they
are not compatible with M-profile and we also need to ensure that the
FP instructions are enabled (with -mfloat-abi=softfp/hard). That
leads to some complicated checking as arm_neon.h includes stdint.h
and, at least on linux, that can require that the appropriate ABI
bits/ headers are also installed.
This patch adds a new check to target-supports.exp to establish the
minimal set of option overrides needed to enable use of this header in
a test.
gcc/testsuite:
* lib/target-supports.exp
(check_effective_target_arm_neon_h_ok_nocache): New function.
(check_effective_target_arm_neon_h_ok): Likewise.
(add_options_for_arm_neon_h): Likewise.
(check_effective_target_arm_libc_fp_abi_ok_nocache): Allow any
Arm target, not just arm32.
* gcc.target/arm/attr-neon-builtin-fail.c: Use it.
* gcc.target/arm/attr-neon-builtin-fail2.c: Likewise.
* gcc.target/arm/attr-neon-fp16.c: Likewise.
* gcc.target/arm/attr-neon2.c: Likewise.
Diff:
---
.../gcc.target/arm/attr-neon-builtin-fail.c | 6 +--
.../gcc.target/arm/attr-neon-builtin-fail2.c | 5 +-
gcc/testsuite/gcc.target/arm/attr-neon-fp16.c | 4 +-
gcc/testsuite/gcc.target/arm/attr-neon2.c | 5 +-
gcc/testsuite/lib/target-supports.exp | 53 +++++++++++++++++++++-
5 files changed, 60 insertions(+), 13 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail.c
b/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail.c
index fb6e0b9cd66a..645d708f0050 100644
--- a/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail.c
+++ b/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail.c
@@ -1,9 +1,8 @@
/* Check that calling a neon builtin from a function compiled with vfp fails.
*/
/* { dg-do compile } */
-/* { dg-require-effective-target arm_fp_ok } */
-/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-require-effective-target arm_neon_h_ok } */
/* { dg-options "-O2" } */
-/* { dg-add-options arm_fp } */
+/* { dg-add-options arm_neon_h } */
#include <arm_neon.h>
@@ -15,4 +14,3 @@ foo (uint8x16_t *p)
}
/* { dg-error "inlining failed in call to 'always_inline'" "" { target *-*-* }
0 } */
-
diff --git a/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail2.c
b/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail2.c
index 9cb5a2ebb905..ed0c4634b772 100644
--- a/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail2.c
+++ b/gcc/testsuite/gcc.target/arm/attr-neon-builtin-fail2.c
@@ -1,8 +1,8 @@
/* Check that calling a neon builtin from a function compiled with vfp fails.
*/
/* { dg-do compile } */
-/* { dg-require-effective-target arm_vfp_ok } */
+/* { dg-require-effective-target arm_neon_h_ok } */
/* { dg-options "-O2" } */
-/* { dg-add-options arm_vfp } */
+/* { dg-add-options arm_neon_h } */
extern __simd64_int8_t a, b;
@@ -13,4 +13,3 @@ foo (__simd128_int16_t *p)
*p = (__simd128_int16_t)__builtin_neon_vaddlsv8qi (a, b); /* { dg-error "You
must enable NEON instructions .*" } */
}
-
diff --git a/gcc/testsuite/gcc.target/arm/attr-neon-fp16.c
b/gcc/testsuite/gcc.target/arm/attr-neon-fp16.c
index d7b75645bc45..a5982604f9ed 100644
--- a/gcc/testsuite/gcc.target/arm/attr-neon-fp16.c
+++ b/gcc/testsuite/gcc.target/arm/attr-neon-fp16.c
@@ -1,8 +1,8 @@
/* { dg-do compile } */
/* { dg-skip-if "-mpure-code supports M-profile only and without Neon" { *-*-*
} { "-mpure-code" } } */
-/* { dg-require-effective-target arm_fp_ok } */
+/* { dg-require-effective-target arm_neon_h_ok } */
/* { dg-options "-mfp16-format=ieee" } */
-/* { dg-add-options arm_fp } */
+/* { dg-add-options arm_neon_h } */
#include "arm_neon.h"
diff --git a/gcc/testsuite/gcc.target/arm/attr-neon2.c
b/gcc/testsuite/gcc.target/arm/attr-neon2.c
index a7a72dac379d..c0f7667c2dcd 100644
--- a/gcc/testsuite/gcc.target/arm/attr-neon2.c
+++ b/gcc/testsuite/gcc.target/arm/attr-neon2.c
@@ -1,8 +1,7 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-require-effective-target arm_fp_ok } */
+/* { dg-require-effective-target arm_neon_h_ok } */
/* { dg-options "-Ofast" } */
-/* { dg-add-options arm_fp } */
+/* { dg-add-options arm_neon_h } */
/* Reset fpu to a value compatible with the next pragmas. */
#pragma GCC target ("fpu=vfp")
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index d02d1fa9becb..a184ef37ccb4 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5127,7 +5127,7 @@ proc add_options_for_arm_fp { flags } {
proc check_effective_target_arm_libc_fp_abi_ok_nocache { } {
global et_arm_libc_fp_abi_flags
set et_arm_libc_fp_abi_flags ""
- if { [check_effective_target_arm32] } {
+ if { [istarget arm*-*-*] } {
foreach flags {"-mfloat-abi=hard" "-mfloat-abi=softfp"} {
if { [check_no_compiler_messages_nocache arm_libc_fp_abi_ok object {
#include <stdint.h>
@@ -5155,6 +5155,57 @@ proc add_options_for_arm_libc_fp_abi { flags } {
return "$flags $et_arm_libc_fp_abi_flags"
}
+# Try to find the minimal set of flags needed to make the header file
+# arm_neon.h compatible with this compilation. This is complicated due
+# to the fact that this header doesn't work properly on m-profile cores
+# and also won't work correctly if the wrong floating-point ABI is used
+# on the platform (since arm_neon.h can include stdint.h, which on Linux
+# will pull in stub headers that aren't installed).
+# Note: This will not necessarily enable Neon instructions, just provide
+# something where the header will not cause errors.
+
+proc check_effective_target_arm_neon_h_ok_nocache { } {
+ # none-arm or thumb1 cannot support neon, so there's no point in
+ # looking further.
+ if { [istarget arm*-*-*] } {
+ global et_arm_neon_h_flags
+ set base_flags [add_options_for_arm_libc_fp_abi ""]
+ foreach flags {"" "-mfpu=auto" "-marm" "-marm -mfpu=auto" \
+ "-mcpu=unset -march=armv7-a+fp -mfpu=auto" } {
+ if { [check_no_compiler_messages_nocache arm_neon_h_ok assembly {
+ #if __ARM_ARCH < 5
+ #error architecture too low for FP
+ #endif
+ #if __ARM_ARCH < 7
+ #if !defined(__arm__) || (defined(__thumb__) &&
!defined(__thumb2__))
+ #error incompatible arch or mode
+ #endif
+ #endif
+ #if __ARM_ARCH_PROFILE == 'M'
+ #error incompatible profile
+ #endif
+ } "$base_flags $flags" ] } {
+ set et_arm_neon_h_flags "$base_flags $flags"
+ return 1
+ }
+ }
+ }
+ return 0
+}
+
+proc check_effective_target_arm_neon_h_ok { } {
+ return [check_cached_effective_target arm_neon_h_ok \
+ check_effective_target_arm_neon_h_ok_nocache]
+}
+
+proc add_options_for_arm_neon_h { flags } {
+ if { ! [check_effective_target_arm_neon_h_ok] } {
+ return "$flags"
+ }
+ global et_arm_neon_h_flags
+ return "$flags $et_arm_neon_h_flags"
+}
+
# Return 1 if this is an ARM target defining __ARM_FP with
# double-precision support. We may need -mfloat-abi=softfp or
# equivalent options. Some multilibs may be incompatible with these
