[gcc r15-7809] aarch64: force operand to fresh register to avoid subreg issues [PR118892]

[Tamar Christina via Gcc-cvs]

https://gcc.gnu.org/g:d883f3233c4b7e0dce52539a12dfcccc8aff43e4

commit r15-7809-gd883f3233c4b7e0dce52539a12dfcccc8aff43e4
Author: Tamar Christina <tamar.christ...@arm.com>
Date:   Tue Mar 4 11:15:26 2025 +0000

    aarch64: force operand to fresh register to avoid subreg issues [PR118892]
    
    When the input is already a subreg and we try to make a paradoxical
    subreg out of it for copysign this can fail if it violates the subreg
    relationship.
    
    Use force_lowpart_subreg instead of lowpart_subreg to then force the
    results to a register instead of ICEing.
    
    gcc/ChangeLog:
    
            PR target/118892
            * config/aarch64/aarch64.md (copysign<GPF:mode>3): Use
            force_lowpart_subreg instead of lowpart_subreg.
    
    gcc/testsuite/ChangeLog:
    
            PR target/118892
            * gcc.target/aarch64/copysign-pr118892.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64.md                        |  2 +-
 gcc/testsuite/gcc.target/aarch64/copysign-pr118892.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index cfe730f3732c..b10059e4f580 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -7480,7 +7480,7 @@
     {
       emit_insn (gen_ior<vq_int_equiv>3 (
        lowpart_subreg (<VQ_INT_EQUIV>mode, operands[0], <MODE>mode),
-       lowpart_subreg (<VQ_INT_EQUIV>mode, operands[1], <MODE>mode),
+       force_lowpart_subreg (<VQ_INT_EQUIV>mode, operands[1], <MODE>mode),
        v_bitmask));
       DONE;
     }
diff --git a/gcc/testsuite/gcc.target/aarch64/copysign-pr118892.c 
b/gcc/testsuite/gcc.target/aarch64/copysign-pr118892.c
new file mode 100644
index 000000000000..adfa30dc3e2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/copysign-pr118892.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast" } */
+
+double l();
+double f()
+{
+  double t6[2] = {l(), l()};
+  double t7[2];
+  __builtin_memcpy(&t7, &t6, sizeof(t6));
+  return -__builtin_fabs(t7[1]);
+}