https://gcc.gnu.org/g:1a3e73b82867a49d877b8328b66406cf484a93f2
commit 1a3e73b82867a49d877b8328b66406cf484a93f2
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Mon Feb 10 19:47:32 2025 -0500
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.bugs | 112 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
index 64df6453aa9b..288addbed9b0 100644
--- a/gcc/ChangeLog.bugs
+++ b/gcc/ChangeLog.bugs
@@ -1,3 +1,115 @@
+==================== Branch work193-bugs, patch #210 ====================
+
+Fix PR 118541, do not generate unordered fp cmoves for IEEE compares.
+
+This is version 3 of the patch.
+
+In bug PR target/118541 on power9, power10, and power11 systems, for the
+function:
+
+ extern double __ieee754_acos (double);
+
+ double
+ __acospi (double x)
+ {
+ double ret = __ieee754_acos (x) / 3.14;
+ return __builtin_isgreater (ret, 1.0) ? 1.0 : ret;
+ }
+
+GCC currently generates the following code:
+
+ Power9 Power10 and Power11
+ ====== ===================
+ bl __ieee754_acos bl __ieee754_acos@notoc
+ nop plfd 0,.LC0@pcrel
+ addis 9,2,.LC2@toc@ha xxspltidp 12,1065353216
+ addi 1,1,32 addi 1,1,32
+ lfd 0,.LC2@toc@l(9) ld 0,16(1)
+ addis 9,2,.LC0@toc@ha fdiv 0,1,0
+ ld 0,16(1) mtlr 0
+ lfd 12,.LC0@toc@l(9) xscmpgtdp 1,0,12
+ fdiv 0,1,0 xxsel 1,0,12,1
+ mtlr 0 blr
+ xscmpgtdp 1,0,12
+ xxsel 1,0,12,1
+ blr
+
+This is because ifcvt.c optimizes the conditional floating point move to use
the
+XSCMPGTDP instruction.
+
+However, the XSCMPGTDP instruction will generate an interrupt if one of the
+arguments is a signalling NaN and signalling NaNs can generate an interrupt.
+The IEEE comparison functions (isgreater, etc.) require that the comparison not
+raise an interrupt.
+
+The following patch changes the PowerPC back end so that ifcvt.c will not
change
+the if/then test and move into a conditional move if the comparison is one of
+the comparisons that do not raise an error with signalling NaNs and -Ofast is
+not used. If a normal comparison is used or -Ofast is used, GCC will continue
+to generate XSCMPGTDP and XXSEL.
+
+For the following code:
+
+ double
+ ordered_compare (double a, double b, double c, double d)
+ {
+ return __builtin_isgreater (a, b) ? c : d;
+ }
+
+ /* Verify normal > does generate xscmpgtdp. */
+
+ double
+ normal_compare (double a, double b, double c, double d)
+ {
+ return a > b ? c : d;
+ }
+
+with the following patch, GCC generates the following for power9, power10, and
+power11:
+
+ ordered_compare:
+ fcmpu 0,1,2
+ fmr 1,4
+ bnglr 0
+ fmr 1,3
+ blr
+
+ normal_compare:
+ xscmpgtdp 1,1,2
+ xxsel 1,4,3,1
+ blr
+
+I have built bootstrap compilers on big endian power9 systems and little endian
+power9/power10 systems and there were no regressions. Can I check this patch
+into the GCC trunk, and after a waiting period, can I check this into the
active
+older branches?
+
+2025-02-10 Michael Meissner <meiss...@linux.ibm.com>
+
+gcc/
+
+ PR target/118541
+ * config/rs6000/predicates.md (invert_fpmask_comparison_operator): Do
+ not allow UNLT and UNLE unless -ffast-math or not power9.
+ * config/rs6000/rs6000-protos.h (enum reverse_condition_t): New
+ enumeration.
+ (rs6000_reverse_condition): Add argument.
+ * config/rs6000/rs6000.cc (rs6000_reverse_condition): Do not allow
+ ordered comparisons to be reversed for floating point conditional moves,
+ but allow ordered comparisons to be reversed on jumps.
+ (rs6000_emit_sCOND): Adjust rs6000_reverse_condition call.
+ * config/rs6000/rs6000.h (REVERSE_CONDITION): Likewise.
+ * config/rs6000/rs6000.md (reverse_branch_comparison): Name insn.
+ Adjust rs6000_reverse_condition calls.
+
+gcc/testsuite/
+
+ PR target/118541
+ * gcc.target/powerpc/pr118541-1.c: New test.
+ * gcc.target/powerpc/pr118541-2.c: Likewise.
+ * gcc.target/powerpc/pr118541-3.c: Likewise.
+ * gcc.target/powerpc/pr118541-4.c: Likewise.
+
==================== Branch work193-bugs, patch #202 ====================
PR target/108958 -- use mtvsrdd to zero extend GPR DImode to VSX TImode
