[gcc r15-7145] LoongArch: Fix invalid subregs in xorsign [PR118501]

[Xi Ruoyao via Gcc-cvs]

https://gcc.gnu.org/g:9ddf4a6cc650360e620c8fd97f550bf833cc177a

commit r15-7145-g9ddf4a6cc650360e620c8fd97f550bf833cc177a
Author: Xi Ruoyao <xry...@xry111.site>
Date:   Wed Jan 22 17:16:29 2025 +0800

    LoongArch: Fix invalid subregs in xorsign [PR118501]
    
    The test case added in r15-7073 now triggers an ICE, indicating we need
    the same fix as AArch64.
    
    gcc/ChangeLog:
    
            PR target/118501
            * config/loongarch/loongarch.md (@xorsign<mode>3): Use
            force_lowpart_subreg.

Diff:
---
 gcc/config/loongarch/loongarch.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/loongarch/loongarch.md 
b/gcc/config/loongarch/loongarch.md
index 1392325038cd..701f31fbb17c 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -1347,8 +1347,8 @@
   machine_mode lsx_mode
     = <MODE>mode == SFmode ? V4SFmode : V2DFmode;
   rtx tmp = gen_reg_rtx (lsx_mode);
-  rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode);
-  rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode);
+  rtx op1 = force_lowpart_subreg (lsx_mode, operands[1], <MODE>mode);
+  rtx op2 = force_lowpart_subreg (lsx_mode, operands[2], <MODE>mode);
   emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2));
   emit_move_insn (operands[0],
           lowpart_subreg (<MODE>mode, tmp, lsx_mode));