https://gcc.gnu.org/g:8e47615f24b9fdebf14e270e6131cea6a67f1b04
commit r15-6319-g8e47615f24b9fdebf14e270e6131cea6a67f1b04
Author: Xi Ruoyao <xry...@xry111.site>
Date: Mon Dec 2 14:48:24 2024 +0800
LoongArch: Remove QHSD and use QHWD instead
QHSD and QHWD are basically the same thing, but QHSD will be incorrect
when we start to add LA32 support. So it's just better to always use
QHWD.
gcc/ChangeLog:
* config/loongarch/loongarch.md (QHSD): Remove.
(loongarch_<crc>_w_<size>_w): Use QHSD instead of QHWD.
(loongarch_<crc>_w_<size>_w_extended): Likewise.
Diff:
---
gcc/config/loongarch/loongarch.md | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.md
b/gcc/config/loongarch/loongarch.md
index a65cc1de2d2e..bf322240271c 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -4345,13 +4345,12 @@
-(define_mode_iterator QHSD [QI HI SI DI])
(define_int_iterator CRC [UNSPEC_CRC UNSPEC_CRCC])
(define_int_attr crc [(UNSPEC_CRC "crc") (UNSPEC_CRCC "crcc")])
(define_insn "loongarch_<crc>_w_<size>_w"
[(set (match_operand:SI 0 "register_operand" "=r")
- (unspec:SI [(match_operand:QHSD 1 "register_operand" "r")
+ (unspec:SI [(match_operand:QHWD 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r")]
CRC))]
""
@@ -4362,7 +4361,7 @@
(define_insn "loongarch_<crc>_w_<size>_w_extended"
[(set (match_operand:DI 0 "register_operand" "=r")
(sign_extend:DI
- (unspec:SI [(match_operand:QHSD 1 "register_operand" "r")
+ (unspec:SI [(match_operand:QHWD 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r")]
CRC)))]
"TARGET_64BIT"
