https://gcc.gnu.org/g:fb64a7b0e1d7488e6e3ae96af8d97fd2226b6d21
commit r15-5917-gfb64a7b0e1d7488e6e3ae96af8d97fd2226b6d21 Author: Pan Li <pan2...@intel.com> Date: Wed Dec 4 13:53:52 2024 +0800 RISC-V: Add assert for insn operand out of range access [PR117878][NFC] According to the the initial analysis of PR117878, the ice comes from the out-of-range operand access for recog_data.operand[]. Thus, add one assert here to expose this explicitly. PR target/117878 gcc/ChangeLog: * config/riscv/riscv-v.cc (vlmax_avl_type_p): Add assert for out of range access. (nonvlmax_avl_type_p): Ditto. Signed-off-by: Pan Li <pan2...@intel.com> Diff: --- gcc/config/riscv/riscv-v.cc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index ee7a0128c0ed..47bc0255aa38 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -5174,6 +5174,9 @@ vlmax_avl_type_p (rtx_insn *rinsn) int index = get_attr_avl_type_idx (rinsn); if (index == INVALID_ATTRIBUTE) return false; + + gcc_assert (index < recog_data.n_operands); + rtx avl_type = recog_data.operand[index]; return INTVAL (avl_type) == VLMAX; } @@ -5222,6 +5225,9 @@ nonvlmax_avl_type_p (rtx_insn *rinsn) int index = get_attr_avl_type_idx (rinsn); if (index == INVALID_ATTRIBUTE) return false; + + gcc_assert (index < recog_data.n_operands); + rtx avl_type = recog_data.operand[index]; return INTVAL (avl_type) == NONVLMAX; }