https://gcc.gnu.org/g:c10767d0e498692729eb47313d23a10af792aef6

commit r15-5484-gc10767d0e498692729eb47313d23a10af792aef6
Author: Pan Li <pan2...@intel.com>
Date:   Tue Nov 19 15:18:53 2024 +0800

    RISC-V: Fix incorrect optimization options passing to strided ld/st test
    
    The testcases of vector strided load/store are designed to pick up
    different sorts of optimization options but actually these option
    are ignored according to the Execution log of gcc.log.  This patch
    would like to make it correct, and then you will see the build option
    similar as below from the gcc.log.
    
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=scalable 
-mrvv-max-lmul=m1 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=zvl 
-mrvv-max-lmul=m1 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=scalable 
-mrvv-max-lmul=m4 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=scalable 
-mrvv-max-lmul=m8 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=zvl 
-mrvv-max-lmul=dynamic ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=zvl 
-mrvv-max-lmul=m8 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=zvl 
-mrvv-max-lmul=m4 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=scalable 
-mrvv-max-lmul=m2 ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=scalable 
-mrvv-max-lmul=dynamic ...
    Executing ... strided_ld_st-1-f16.c -O3 -mrvv-vector-bits=zvl 
-mrvv-max-lmul=m2 ...
    
    The below test suites are passed for this patch.
    * The rv64gcv fully regression test.
    
    It is test only patch and obvious up to a point, will commit it
    directly if no comments in next 48H.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/rvv.exp: Fix the incorrect optimization 
options.
    
    Signed-off-by: Pan Li <pan2...@intel.com>

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp 
b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 12002dd51bf5..dbe1f11c0e8c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -121,7 +121,7 @@ foreach op $AUTOVEC_TEST_OPTS {
   dg-runtest [lsort [glob -nocomplain 
$srcdir/$subdir/autovec/gather-scatter/*.\[cS\]]] \
     "" "$op"
   dg-runtest [lsort [glob -nocomplain 
$srcdir/$subdir/autovec/strided/*.\[cS\]]] \
-    "" "$op"
+    "$op" ""
 }
 
 # All done.

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