https://gcc.gnu.org/g:156f536d54b2f6f41de4719f9b3a8a33273a51a9

commit r15-5029-g156f536d54b2f6f41de4719f9b3a8a33273a51a9
Author: Richard Sandiford <richard.sandif...@arm.com>
Date:   Thu Nov 7 20:34:50 2024 +0000

    aarch64: Fix gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c
    
    I missed a search-and-replace on this test, meaning that it was
    duplicating bfmlalb_f32.c.
    
    gcc/testsuite/
            * gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c: Replace bfmla*
            with bfmls*

Diff:
---
 .../gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c | 60 +++++++++++-----------
 1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c 
b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c
index f67316cd33ce..946af545141c 100644
--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c
+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c
@@ -3,63 +3,63 @@
 #include "test_sme2_acle.h"
 
 /*
-** bfmlalb_f32_tied1:
-**     bfmlalb z0\.s, z4\.h, z5\.h
+** bfmlslb_f32_tied1:
+**     bfmlslb z0\.s, z4\.h, z5\.h
 **     ret
 */
-TEST_DUAL_Z (bfmlalb_f32_tied1, svfloat32_t, svbfloat16_t,
-            z0 = svbfmlalb_f32 (z0, z4, z5),
-            z0 = svbfmlalb (z0, z4, z5))
+TEST_DUAL_Z (bfmlslb_f32_tied1, svfloat32_t, svbfloat16_t,
+            z0 = svbfmlslb_f32 (z0, z4, z5),
+            z0 = svbfmlslb (z0, z4, z5))
 
 /*
-** bfmlalb_f32_tied2:
+** bfmlslb_f32_tied2:
 **     mov     (z[0-9]+)\.d, z0\.d
 **     movprfx z0, z4
-**     bfmlalb z0\.s, \1\.h, z1\.h
+**     bfmlslb z0\.s, \1\.h, z1\.h
 **     ret
 */
-TEST_DUAL_Z_REV (bfmlalb_f32_tied2, svfloat32_t, svbfloat16_t,
-                z0_res = svbfmlalb_f32 (z4, z0, z1),
-                z0_res = svbfmlalb (z4, z0, z1))
+TEST_DUAL_Z_REV (bfmlslb_f32_tied2, svfloat32_t, svbfloat16_t,
+                z0_res = svbfmlslb_f32 (z4, z0, z1),
+                z0_res = svbfmlslb (z4, z0, z1))
 
 /*
-** bfmlalb_f32_tied3:
+** bfmlslb_f32_tied3:
 **     mov     (z[0-9]+)\.d, z0\.d
 **     movprfx z0, z4
-**     bfmlalb z0\.s, z1\.h, \1\.h
+**     bfmlslb z0\.s, z1\.h, \1\.h
 **     ret
 */
-TEST_DUAL_Z_REV (bfmlalb_f32_tied3, svfloat32_t, svbfloat16_t,
-                z0_res = svbfmlalb_f32 (z4, z1, z0),
-                z0_res = svbfmlalb (z4, z1, z0))
+TEST_DUAL_Z_REV (bfmlslb_f32_tied3, svfloat32_t, svbfloat16_t,
+                z0_res = svbfmlslb_f32 (z4, z1, z0),
+                z0_res = svbfmlslb (z4, z1, z0))
 
 /*
-** bfmlalb_f32_untied:
+** bfmlslb_f32_untied:
 **     movprfx z0, z1
-**     bfmlalb z0\.s, z4\.h, z5\.h
+**     bfmlslb z0\.s, z4\.h, z5\.h
 **     ret
 */
-TEST_DUAL_Z (bfmlalb_f32_untied, svfloat32_t, svbfloat16_t,
-            z0 = svbfmlalb_f32 (z1, z4, z5),
-            z0 = svbfmlalb (z1, z4, z5))
+TEST_DUAL_Z (bfmlslb_f32_untied, svfloat32_t, svbfloat16_t,
+            z0 = svbfmlslb_f32 (z1, z4, z5),
+            z0 = svbfmlslb (z1, z4, z5))
 
 /*
-** bfmlalb_h7_f32_tied1:
+** bfmlslb_h7_f32_tied1:
 **     mov     (z[0-9]+\.h), h7
-**     bfmlalb z0\.s, z4\.h, \1
+**     bfmlslb z0\.s, z4\.h, \1
 **     ret
 */
-TEST_DUAL_ZD (bfmlalb_h7_f32_tied1, svfloat32_t, svbfloat16_t, bfloat16_t,
-             z0 = svbfmlalb_n_f32 (z0, z4, d7),
-             z0 = svbfmlalb (z0, z4, d7))
+TEST_DUAL_ZD (bfmlslb_h7_f32_tied1, svfloat32_t, svbfloat16_t, bfloat16_t,
+             z0 = svbfmlslb_n_f32 (z0, z4, d7),
+             z0 = svbfmlslb (z0, z4, d7))
 
 /*
-** bfmlalb_h7_f32_untied:
+** bfmlslb_h7_f32_untied:
 **     mov     (z[0-9]+\.h), h7
 **     movprfx z0, z1
-**     bfmlalb z0\.s, z4\.h, \1
+**     bfmlslb z0\.s, z4\.h, \1
 **     ret
 */
-TEST_DUAL_ZD (bfmlalb_h7_f32_untied, svfloat32_t, svbfloat16_t, bfloat16_t,
-             z0 = svbfmlalb_n_f32 (z1, z4, d7),
-             z0 = svbfmlalb (z1, z4, d7))
+TEST_DUAL_ZD (bfmlslb_h7_f32_untied, svfloat32_t, svbfloat16_t, bfloat16_t,
+             z0 = svbfmlslb_n_f32 (z1, z4, d7),
+             z0 = svbfmlslb (z1, z4, d7))

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