https://gcc.gnu.org/g:16801e4957bf2a3b7d917deb2cad3e879a9579cf
commit r15-5009-g16801e4957bf2a3b7d917deb2cad3e879a9579cf
Author: Pan Li <pan2...@intel.com>
Date: Tue Oct 29 22:37:07 2024 +0800
Doc: Add doc for standard name mask_len_strided_load{store}m
This patch would like to add doc for the below 2 standard names.
1. strided load: v = mask_len_strided_load (ptr, stried, mask, len, bias)
2. strided store: mask_len_stried_store (ptr, stride, v, mask, len, bias)
gcc/ChangeLog:
* doc/md.texi: Add doc for mask_len_stried_load{store}.
Signed-off-by: Pan Li <pan2...@intel.com>
Co-Authored-By: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Diff:
---
gcc/doc/md.texi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 6d9c8643739f..25ded86f0d14 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5135,6 +5135,20 @@ Bit @var{i} of the mask is set if element @var{i} of the
result should
be loaded from memory and clear if element @var{i} of the result should be
undefined.
Mask elements @var{i} with @var{i} > (operand 6 + operand 7) are ignored.
+@cindex @code{mask_len_strided_load@var{m}} instruction pattern
+@item @samp{mask_len_strided_load@var{m}}
+Load several separate memory locations into a destination vector of mode
@var{m}.
+Operand 0 is a destination vector of mode @var{m}.
+Operand 1 is a scalar base address and operand 2 is a scalar stride of Pmode.
+operand 3 is mask operand, operand 4 is length operand and operand 5 is bias
operand.
+The instruction can be seen as a special case of
@code{mask_len_gather_load@var{m}@var{n}}
+with an offset vector that is a @code{vec_series} with zero as base and
operand 2 as step.
+For each element the load address is operand 1 + @var{i} * operand 2.
+Similar to mask_len_load, the instruction loads at most (operand 4 + operand
5) elements from memory.
+Element @var{i} of the mask (operand 3) is set if element @var{i} of the
result should
+be loaded from memory and clear if element @var{i} of the result should be
zero.
+Mask elements @var{i} with @var{i} > (operand 4 + operand 5) are ignored.
+
@cindex @code{scatter_store@var{m}@var{n}} instruction pattern
@item @samp{scatter_store@var{m}@var{n}}
Store a vector of mode @var{m} into several distinct memory locations.
@@ -5172,6 +5186,19 @@ at most (operand 6 + operand 7) elements of (operand 4)
to memory.
Bit @var{i} of the mask is set if element @var{i} of (operand 4) should be
stored.
Mask elements @var{i} with @var{i} > (operand 6 + operand 7) are ignored.
+@cindex @code{mask_len_strided_store@var{m}} instruction pattern
+@item @samp{mask_len_strided_store@var{m}}
+Store a vector of mode m into several distinct memory locations.
+Operand 0 is a scalar base address and operand 1 is scalar stride of Pmode.
+Operand 2 is the vector of values that should be stored, which is of mode
@var{m}.
+operand 3 is mask operand, operand 4 is length operand and operand 5 is bias
operand.
+The instruction can be seen as a special case of
@code{mask_len_scatter_store@var{m}@var{n}}
+with an offset vector that is a @code{vec_series} with zero as base and
operand 1 as step.
+For each element the store address is operand 0 + @var{i} * operand 1.
+Similar to mask_len_store, the instruction stores at most (operand 4 + operand
5) elements of
+mask (operand 3) to memory. Element @var{i} of the mask is set if element
@var{i} of (operand 3)
+should be stored. Mask elements @var{i} with @var{i} > (operand 4 + operand
5) are ignored.
+
@cindex @code{vec_set@var{m}} instruction pattern
@item @samp{vec_set@var{m}}
Set given field in the vector value. Operand 0 is the vector to modify,
