https://gcc.gnu.org/g:b14dfe6b74c847664c077c8d71842d117e818677
commit b14dfe6b74c847664c077c8d71842d117e818677
Author: Szabolcs Nagy <szabolcs.n...@arm.com>
Date: Tue May 9 15:37:49 2023 +0100
aarch64: Add support for chkfeat insn
This is a hint space instruction to check for enabled HW features and
update the x16 register accordingly.
Use unspec_volatile to prevent reordering it around calls since calls
can enable or disable HW features.
gcc/ChangeLog:
* config/aarch64/aarch64.md (aarch64_chkfeat): New.
Diff:
---
gcc/config/aarch64/aarch64.md | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c54b29cd64b9..43bed0ce10fd 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -381,6 +381,7 @@
UNSPECV_BTI_C ; Represent BTI c.
UNSPECV_BTI_J ; Represent BTI j.
UNSPECV_BTI_JC ; Represent BTI jc.
+ UNSPECV_CHKFEAT ; Represent CHKFEAT X16.
UNSPECV_TSTART ; Represent transaction start.
UNSPECV_TCOMMIT ; Represent transaction commit.
UNSPECV_TCANCEL ; Represent transaction cancel.
@@ -8312,6 +8313,14 @@
"msr\tnzcv, %0"
)
+;; CHKFEAT instruction
+(define_insn "aarch64_chkfeat"
+ [(set (reg:DI R16_REGNUM)
+ (unspec_volatile:DI [(reg:DI R16_REGNUM)] UNSPECV_CHKFEAT))]
+ ""
+ "hint\\t40 // chkfeat x16"
+)
+
;; AdvSIMD Stuff
(include "aarch64-simd.md")
