https://gcc.gnu.org/g:cbcae46e703e164b078309eca1261fb8afcf5993
commit cbcae46e703e164b078309eca1261fb8afcf5993
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Oct 1 04:16:49 2024 -0400
Revert patch.
2024-10-01 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* config/rs6000/rs6000-protos.h (enum vpair_split_unary): Revert.
(vpair_split_unary): Likewise.
(vpair_split_binary): Likewise.
(enum vpair_split_fma): Likewise.
(vpair_split_fma): Likewise.
* config/rs6000/rs6000.cc (vpair_split_unary): Likewise.
(vpair_split_binary): Likewise.
(vpair_split_fma): Likewise.
* config/rs6000/vector-pair.md (vpair_spdp): Delete.
(vpair_insn): Likewise.
(vpair_<vpair_stdname>_<vpair_modename>2): Revert.
(vpair_nabs_<vpair_modename>2): Likewise.
(vpair_<vpair_stdname>_<vpair_modename>3): Likewise.
(vpair_fma_<vpair_modename>4): Likewise.
(vpair_fms_<vpair_modename>4): Likewise.
(vpair_nfma_<vpair_modename>4): Likewise.
(vpair_nfms_<vpair_modename>4): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-protos.h | 25 +++++++
gcc/config/rs6000/rs6000.cc | 138 ++++++++++++++++++++++++++++++++++++++
gcc/config/rs6000/vector-pair.md | 95 +++++++++++++++-----------
3 files changed, 220 insertions(+), 38 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-protos.h
b/gcc/config/rs6000/rs6000-protos.h
index da658cd5ab2e..bab5fb437c27 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -161,6 +161,31 @@ extern bool rs6000_pcrel_p (void);
extern bool rs6000_fndecl_pcrel_p (const_tree);
extern void rs6000_output_addr_vec_elt (FILE *, int);
+/* If we are splitting a vector pair unary operator into two separate vector
+ operations, we need to generate a NEG if this is NABS. */
+
+enum vpair_split_unary {
+ VPAIR_SPLIT_NORMAL, /* No extra processing is needed. */
+ VPAIR_SPLIT_NEGATE /* Wrap operation with a NEG. */
+};
+
+extern void vpair_split_unary (rtx [], machine_mode, enum rtx_code,
+ enum vpair_split_unary);
+extern void vpair_split_binary (rtx [], machine_mode, enum rtx_code);
+
+/* When we are splitting a vector pair FMA operation into two vector
operations, we
+ may need to modify the code generated. This enumeration encodes the
+ different choices. */
+
+enum vpair_split_fma {
+ VPAIR_SPLIT_FMA, /* Fused multiply-add. */
+ VPAIR_SPLIT_FMS, /* Fused multiply-subtract. */
+ VPAIR_SPLIT_NFMA, /* Fused negate multiply-add. */
+ VPAIR_SPLIT_NFMS /* Fused negate multiply-subtract. */
+};
+
+extern void vpair_split_fma (rtx [], machine_mode, enum vpair_split_fma);
+
/* Different PowerPC instruction formats that are used by GCC. There are
various other instruction formats used by the PowerPC hardware, but these
formats are not currently used by GCC. */
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 8afa19fd38ac..2be11e542a06 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -29610,6 +29610,144 @@ rs6000_opaque_type_invalid_use_p (gimple *stmt)
return false;
}
+/* Split vector pair unary operations. */
+
+void
+vpair_split_unary (rtx operands[], /* Dest, input. */
+ machine_mode vmode, /* Vector mode. */
+ enum rtx_code code, /* Operator code. */
+ enum vpair_split_unary action) /* Action to take. */
+{
+ rtx op0 = operands[0];
+ machine_mode mode0 = GET_MODE (op0);
+ gcc_assert (GET_MODE_SIZE (mode0) == 32);
+ rtx op0_a = simplify_gen_subreg (vmode, op0, mode0, 0);
+ rtx op0_b = simplify_gen_subreg (vmode, op0, mode0, 16);
+
+ rtx op1 = operands[1];
+ machine_mode mode1 = GET_MODE (op1);
+ gcc_assert (GET_MODE_SIZE (mode0) == 32);
+ rtx op1_a = simplify_gen_subreg (vmode, op1, mode1, 0);
+ rtx op1_b = simplify_gen_subreg (vmode, op1, mode1, 16);
+
+ rtx operation_a = gen_rtx_fmt_e (code, vmode, op1_a);
+ rtx operation_b = gen_rtx_fmt_e (code, vmode, op1_b);
+
+ if (action == VPAIR_SPLIT_NEGATE)
+ {
+ operation_a = gen_rtx_NEG (vmode, operation_a);
+ operation_b = gen_rtx_NEG (vmode, operation_b);
+ }
+
+ emit_insn (gen_rtx_SET (op0_a, operation_a));
+ emit_insn (gen_rtx_SET (op0_b, operation_b));
+ return;
+}
+
+/* Split vector pair binary operations. */
+
+void
+vpair_split_binary (rtx operands[], /* Dest, 2 inputs. */
+ machine_mode vmode, /* Vector mode. */
+ enum rtx_code code) /* Operator code. */
+{
+ rtx op0 = operands[0];
+ machine_mode mode0 = GET_MODE (op0);
+ gcc_assert (GET_MODE_SIZE (mode0) == 32);
+ rtx op0_a = simplify_gen_subreg (vmode, op0, mode0, 0);
+ rtx op0_b = simplify_gen_subreg (vmode, op0, mode0, 16);
+
+ rtx op1 = operands[1];
+ machine_mode mode1 = GET_MODE (op1);
+ gcc_assert (GET_MODE_SIZE (mode1) == 32);
+ rtx op1_a = simplify_gen_subreg (vmode, op1, mode1, 0);
+ rtx op1_b = simplify_gen_subreg (vmode, op1, mode1, 16);
+
+ rtx op2 = operands[2];
+ machine_mode mode2 = GET_MODE (op2);
+ gcc_assert (GET_MODE_SIZE (mode2) == 32);
+ rtx op2_a = simplify_gen_subreg (vmode, op2, mode2, 0);
+ rtx op2_b = simplify_gen_subreg (vmode, op2, mode2, 16);
+
+ rtx operation_a = gen_rtx_fmt_ee (code, vmode, op1_a, op2_a);
+ rtx operation_b = gen_rtx_fmt_ee (code, vmode, op1_b, op2_b);
+
+ emit_insn (gen_rtx_SET (op0_a, operation_a));
+ emit_insn (gen_rtx_SET (op0_b, operation_b));
+ return;
+}
+
+/* Split vector pair fma operations. */
+
+void
+vpair_split_fma (rtx operands[], /* Dest, 3 inputs. */
+ machine_mode vmode, /* Vector mode. */
+ enum vpair_split_fma action) /* Action to take. */
+{
+ rtx op0 = operands[0];
+ machine_mode mode0 = GET_MODE (op0);
+ gcc_assert (GET_MODE_SIZE (mode0) == 32);
+ rtx op0_a = simplify_gen_subreg (vmode, op0, mode0, 0);
+ rtx op0_b = simplify_gen_subreg (vmode, op0, mode0, 16);
+
+ rtx op1 = operands[1];
+ machine_mode mode1 = GET_MODE (op1);
+ gcc_assert (GET_MODE_SIZE (mode1) == 32);
+ rtx op1_a = simplify_gen_subreg (vmode, op1, mode1, 0);
+ rtx op1_b = simplify_gen_subreg (vmode, op1, mode1, 16);
+
+ rtx op2 = operands[2];
+ machine_mode mode2 = GET_MODE (op2);
+ gcc_assert (GET_MODE_SIZE (mode2) == 32);
+ rtx op2_a = simplify_gen_subreg (vmode, op2, mode2, 0);
+ rtx op2_b = simplify_gen_subreg (vmode, op2, mode2, 16);
+
+ rtx op3 = operands[3];
+ machine_mode mode3 = GET_MODE (op3);
+ gcc_assert (GET_MODE_SIZE (mode3) == 32);
+ rtx op3_a = simplify_gen_subreg (vmode, op3, mode3, 0);
+ rtx op3_b = simplify_gen_subreg (vmode, op3, mode3, 16);
+
+ switch (action)
+ {
+ case VPAIR_SPLIT_FMA:
+ case VPAIR_SPLIT_NFMA:
+ break;
+
+ case VPAIR_SPLIT_FMS:
+ case VPAIR_SPLIT_NFMS:
+ op3_a = gen_rtx_NEG (vmode, op3_a);
+ op3_b = gen_rtx_NEG (vmode, op3_b);
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
+
+ rtx operation_a = gen_rtx_fmt_eee (FMA, vmode, op1_a, op2_a, op3_a);
+ rtx operation_b = gen_rtx_fmt_eee (FMA, vmode, op1_b, op2_b, op3_b);
+
+ switch (action)
+ {
+ case VPAIR_SPLIT_FMA:
+ case VPAIR_SPLIT_FMS:
+ break;
+
+ case VPAIR_SPLIT_NFMA:
+ case VPAIR_SPLIT_NFMS:
+ operation_a = gen_rtx_NEG (vmode, operation_a);
+ operation_b = gen_rtx_NEG (vmode, operation_b);
+ break;
+
+ default:
+ gcc_unreachable ();
+ }
+
+ emit_insn (gen_rtx_SET (op0_a, operation_a));
+ emit_insn (gen_rtx_SET (op0_b, operation_b));
+ return;
+}
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-rs6000.h"
diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md
index 6d23be02ffd3..01d32e460f6e 100644
--- a/gcc/config/rs6000/vector-pair.md
+++ b/gcc/config/rs6000/vector-pair.md
@@ -61,10 +61,6 @@
(define_int_attr vpair_modename [(VPAIR_ELEMENT_FLOAT "v8sf")
(VPAIR_ELEMENT_DOUBLE "v4df")])
-;; Suffix for the appropriate vector instruction
-(define_int_attr vpair_spdp [(VPAIR_ELEMENT_FLOAT "sp")
- (VPAIR_ELEMENT_DOUBLE "dp")])
-
;; Unary/binary arithmetic iterator on vector pairs.
(define_int_iterator VPAIR_FP_UNARY [UNSPEC_VPAIR_ABS
UNSPEC_VPAIR_NEG
@@ -89,18 +85,6 @@
(UNSPEC_VPAIR_SMIN "smin")
(UNSPEC_VPAIR_SQRT "sqrt")])
-;; Map the vpair operator unspec number to the instruction
-(define_int_attr vpair_insn [(UNSPEC_VPAIR_ABS "xvabs")
- (UNSPEC_VPAIR_DIV "xvdiv")
- (UNSPEC_VPAIR_FMA "xvmadd")
- (UNSPEC_VPAIR_MINUS "xvsub")
- (UNSPEC_VPAIR_MULT "xvmul")
- (UNSPEC_VPAIR_NEG "xvneg")
- (UNSPEC_VPAIR_PLUS "xvadd")
- (UNSPEC_VPAIR_SMAX "xvmax")
- (UNSPEC_VPAIR_SMIN "xvmin")
- (UNSPEC_VPAIR_SQRT "xvsqrt")])
-
;; Map the vpair operator unspec number to the RTL operator.
(define_int_attr VPAIR_OP [(UNSPEC_VPAIR_ABS "ABS")
(UNSPEC_VPAIR_DIV "DIV")
@@ -221,19 +205,26 @@
;; Vector pair unary operations. The last argument in the UNSPEC is a
;; CONST_INT which identifies what the scalar element is.
-(define_insn "vpair_<vpair_stdname>_<vpair_modename>2"
+(define_insn_and_split "vpair_<vpair_stdname>_<vpair_modename>2"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa")
(unspec:OO
[(match_operand:OO 1 "vsx_register_operand" "wa")
(const_int VPAIR_FP_ELEMENT)]
VPAIR_FP_UNARY))]
"TARGET_MMA"
- "<vpair_insn><vpair_spdp> %x0,%x1\;<vpair_insn><vpair_spdp> %S0,%S1"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_unary (operands, <VPAIR_VMODE>mode, <VPAIR_OP>,
+ VPAIR_SPLIT_NORMAL);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
;; Optimize vector pair (neg (abs)).
-(define_insn "vpair_nabs_<vpair_modename>2"
+(define_insn_and_split "vpair_nabs_<vpair_modename>2"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa")
(unspec:OO
[(unspec:OO
@@ -243,13 +234,19 @@
(const_int VPAIR_FP_ELEMENT)]
UNSPEC_VPAIR_NEG))]
"TARGET_MMA"
- "xvnabs<vpair_spdp> %x0,%x1\;xvnabs<vpair_spdp> %S0,%S1"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_unary (operands, <VPAIR_VMODE>mode, ABS, VPAIR_SPLIT_NEGATE);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
;; Vector pair binary operations. The last argument in the UNSPEC is a
;; CONST_INT which identifies what the scalar element is.
-(define_insn "vpair_<vpair_stdname>_<vpair_modename>3"
+(define_insn_and_split "vpair_<vpair_stdname>_<vpair_modename>3"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa")
(unspec:OO
[(match_operand:OO 1 "vsx_register_operand" "wa")
@@ -257,7 +254,13 @@
(const_int VPAIR_FP_ELEMENT)]
VPAIR_FP_BINARY))]
"TARGET_MMA"
- "<vpair_insn><vpair_spdp> %x0,%x1,%x2\;<vpair_insn><vpair_spdp> %S0,%S1,%S2"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_binary (operands, <VPAIR_VMODE>mode, <VPAIR_OP>);
+ DONE;
+}
[(set_attr "length" "8")
(set (attr "type") (if_then_else (match_test "<VPAIR_OP> == DIV")
(const_string "<vpair_divtype>")
@@ -290,7 +293,7 @@
;; Vector pair fused-multiply (FMA) operations. The last argument in the
;; UNSPEC is a CONST_INT which identifies what the scalar element is.
-(define_insn "vpair_fma_<vpair_modename>4"
+(define_insn_and_split "vpair_fma_<vpair_modename>4"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
(unspec:OO
[(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
@@ -299,14 +302,18 @@
(const_int VPAIR_FP_ELEMENT)]
UNSPEC_VPAIR_FMA))]
"TARGET_MMA"
- "@
- xvmadda<vpair_spdp> %x0,%x1,%x2\;xvmadda<vpair_spdp> %S0,%S1,%S2
- xvmaddm<vpair_spdp> %x0,%x1,%x3\;xvmaddm<vpair_spdp> %S0,%S1,%S3"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_fma (operands, <VPAIR_VMODE>mode, VPAIR_SPLIT_FMA);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
;; Vector pair fused multiply-subtract
-(define_insn "vpair_fms_<vpair_modename>4"
+(define_insn_and_split "vpair_fms_<vpair_modename>4"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
(unspec:OO
[(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
@@ -318,14 +325,18 @@
(const_int VPAIR_FP_ELEMENT)]
UNSPEC_VPAIR_FMA))]
"TARGET_MMA"
- "@
- xvmsuba<vpair_spdp> %x0,%x1,%x2\;xvmsuba<vpair_spdp> %S0,%S1,%S2
- xvmsubm<vpair_spdp> %x0,%x1,%x3\;xvmsubm<vpair_spdp> %S0,%S1,%S3"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_fma (operands, <VPAIR_VMODE>mode, VPAIR_SPLIT_FMS);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
;; Vector pair negate fused multiply-add
-(define_insn "vpair_nfma_<vpair_modename>4"
+(define_insn_and_split "vpair_nfma_<vpair_modename>4"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
(unspec:OO
[(unspec:OO
@@ -337,14 +348,18 @@
(const_int VPAIR_FP_ELEMENT)]
UNSPEC_VPAIR_NEG))]
"TARGET_MMA"
- "@
- xvnmadda<vpair_spdp> %x0,%x1,%x2\;xvnmadda<vpair_spdp> %S0,%S1,%S2
- xvnmaddm<vpair_spdp> %x0,%x1,%x3\;xvnmaddm<vpair_spdp> %S0,%S1,%S3"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_fma (operands, <VPAIR_VMODE>mode, VPAIR_SPLIT_NFMA);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
;; Vector pair fused multiply-subtract
-(define_insn "vpair_nfms_<vpair_modename>4"
+(define_insn_and_split "vpair_nfms_<vpair_modename>4"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
(unspec:OO
[(unspec:OO
@@ -359,9 +374,13 @@
(const_int VPAIR_FP_ELEMENT)]
UNSPEC_VPAIR_NEG))]
"TARGET_MMA"
- "@
- xvnmsuba<vpair_spdp> %x0,%x1,%x2\;xvnmsuba<vpair_spdp> %S0,%S1,%S2
- xvnmsubm<vpair_spdp> %x0,%x1,%x3\;xvnmsubm<vpair_spdp> %S0,%S1,%S3"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
+{
+ vpair_split_fma (operands, <VPAIR_VMODE>mode, VPAIR_SPLIT_NFMS);
+ DONE;
+}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
