https://gcc.gnu.org/g:0b7aaee1ce5fa2f2f5f2239450eb128dd6d2b2e5
commit 0b7aaee1ce5fa2f2f5f2239450eb128dd6d2b2e5
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Aug 20 12:46:42 2024 -0400
Revert changes
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 10 -
gcc/config/rs6000/vector-pair.md | 326 +---------------------
gcc/doc/extend.texi | 9 -
gcc/testsuite/gcc.target/powerpc/vector-pair-10.c | 61 ----
gcc/testsuite/gcc.target/powerpc/vector-pair-11.c | 65 -----
gcc/testsuite/gcc.target/powerpc/vector-pair-12.c | 65 -----
gcc/testsuite/gcc.target/powerpc/vector-pair-5.c | 56 ----
gcc/testsuite/gcc.target/powerpc/vector-pair-6.c | 56 ----
gcc/testsuite/gcc.target/powerpc/vector-pair-7.c | 18 --
gcc/testsuite/gcc.target/powerpc/vector-pair-8.c | 18 --
gcc/testsuite/gcc.target/powerpc/vector-pair-9.c | 61 ----
11 files changed, 1 insertion(+), 744 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def
b/gcc/config/rs6000/rs6000-builtins.def
index b3eaa842f12..099f4b6a008 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -3934,10 +3934,6 @@
void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
STXVP nothing {mma,pair}
-;; Vector pair built-in functions.
- v256 __builtin_vpair_zero ();
- VPAIR_ZERO vpair_zero {mma}
-
;; Vector pair built-in functions with float elements
v256 __builtin_vpair_f32_abs (v256);
VPAIR_F32_ABS vpair_abs_v8sf2 {mma}
@@ -3975,9 +3971,6 @@
v256 __builtin_vpair_f32_nfms (v256, v256, v256);
VPAIR_F32_NFMS vpair_nfms_v8sf4 {mma}
- v256 __builtin_vpair_f32_splat (float);
- VPAIR_F32_SPLAT vpair_splat_v8sf {mma}
-
v256 __builtin_vpair_f32_sub (v256, v256);
VPAIR_F32_SUB vpair_sub_v8sf3 {mma}
@@ -4018,8 +4011,5 @@
v256 __builtin_vpair_f64_nfms (v256, v256, v256);
VPAIR_F64_NFMS vpair_nfms_v4df4 {mma}
- v256 __builtin_vpair_f64_splat (double);
- VPAIR_F64_SPLAT vpair_splat_v4df {mma}
-
v256 __builtin_vpair_f64_sub (v256, v256);
VPAIR_F64_SUB vpair_sub_v4df3 {mma}
diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md
index 7a81acbdc05..73ae46e6d40 100644
--- a/gcc/config/rs6000/vector-pair.md
+++ b/gcc/config/rs6000/vector-pair.md
@@ -38,9 +38,7 @@
UNSPEC_VPAIR_NEG
UNSPEC_VPAIR_PLUS
UNSPEC_VPAIR_SMAX
- UNSPEC_VPAIR_SMIN
- UNSPEC_VPAIR_ZERO
- UNSPEC_VPAIR_SPLAT])
+ UNSPEC_VPAIR_SMIN])
;; Vector pair element ID that defines the scaler element within the vector
pair.
(define_c_enum "vpair_element"
@@ -100,104 +98,6 @@
;; Map the scalar element ID into the appropriate insn type for divide.
(define_int_attr vpair_divtype [(VPAIR_ELEMENT_FLOAT "vecfdiv")
(VPAIR_ELEMENT_DOUBLE "vecdiv")])
-
-;; Mode iterator for the vector modes that we provide splat operations for.
-(define_mode_iterator VPAIR_SPLAT_VMODE [V4SF V2DF])
-
-;; Map element mode to 128-bit vector mode for splat operations
-(define_mode_attr VPAIR_SPLAT_ELEMENT_TO_VMODE [(SF "V4SF")
- (DF "V2DF")])
-
-;; Map either element mode or vector mode into the name for the splat insn.
-(define_mode_attr vpair_splat_name [(SF "v8sf")
- (DF "v4df")
- (V4SF "v8sf")
- (V2DF "v4df")])
-
-;; Initialize a vector pair to 0
-(define_insn_and_split "vpair_zero"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
- (unspec:OO [(const_int 0)] UNSPEC_VPAIR_ZERO))]
- "TARGET_MMA"
- "#"
- "&& reload_completed"
- [(set (match_dup 1) (match_dup 3))
- (set (match_dup 2) (match_dup 3))]
-{
- rtx op0 = operands[0];
-
- operands[1] = simplify_gen_subreg (V2DFmode, op0, OOmode, 0);
- operands[2] = simplify_gen_subreg (V2DFmode, op0, OOmode, 16);
- operands[3] = CONST0_RTX (V2DFmode);
-}
- [(set_attr "length" "8")
- (set_attr "type" "vecperm")])
-
-;; Create a vector pair with a value splat'ed (duplicated) to all of the
-;; elements.
-(define_expand "vpair_splat_<vpair_splat_name>"
- [(use (match_operand:OO 0 "vsx_register_operand"))
- (use (match_operand:SFDF 1 "input_operand"))]
- "TARGET_MMA"
-{
- rtx op0 = operands[0];
- rtx op1 = operands[1];
- machine_mode element_mode = <MODE>mode;
-
- if (op1 == CONST0_RTX (element_mode))
- {
- emit_insn (gen_vpair_zero (op0));
- DONE;
- }
-
- machine_mode vector_mode = <VPAIR_SPLAT_ELEMENT_TO_VMODE>mode;
- rtx vec = gen_reg_rtx (vector_mode);
- unsigned num_elements = GET_MODE_NUNITS (vector_mode);
- rtvec elements = rtvec_alloc (num_elements);
- for (size_t i = 0; i < num_elements; i++)
- RTVEC_ELT (elements, i) = copy_rtx (op1);
-
- rs6000_expand_vector_init (vec, gen_rtx_PARALLEL (vector_mode, elements));
- emit_insn (gen_vpair_splat_<vpair_splat_name>_internal (op0, vec));
- DONE;
-})
-
-;; Inner splat support. Operand1 is the vector splat created above. Allow
-;; operand 1 to overlap with the output registers to eliminate one move
-;; instruction.
-(define_insn_and_split "vpair_splat_<vpair_splat_name>_internal"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(match_operand:VPAIR_SPLAT_VMODE 1 "vsx_register_operand" "0,wa")]
- UNSPEC_VPAIR_SPLAT))]
- "TARGET_MMA"
- "#"
- "&& reload_completed"
- [(const_int 0)]
-{
- rtx op0 = operands[0];
- rtx op0_a = simplify_gen_subreg (<MODE>mode, op0, OOmode, 0);
- rtx op0_b = simplify_gen_subreg (<MODE>mode, op0, OOmode, 16);
- rtx op1 = operands[1];
- unsigned op1_regno = reg_or_subregno (op1);
-
- /* Check if the input is one of the output registers. */
- if (op1_regno == reg_or_subregno (op0_a))
- emit_move_insn (op0_b, op1);
-
- else if (op1_regno == reg_or_subregno (op0_b))
- emit_move_insn (op0_a, op1);
-
- else
- {
- emit_move_insn (op0_a, op1);
- emit_move_insn (op0_b, op1);
- }
-
- DONE;
-}
- [(set_attr "length" "*,8")
- (set_attr "type" "vecmove")])
;; Vector pair unary operations. The last argument in the UNSPEC is a
;; CONST_INT which identifies what the scalar element is.
@@ -261,31 +161,6 @@
(set (attr "type") (if_then_else (match_test "<VPAIR_OP> == DIV")
(const_string "<vpair_divtype>")
(const_string "<vpair_type>")))])
-
-;; Optimize vector pair add of a negative value into a subtract.
-(define_insn_and_split "*vpair_add_neg_<vpair_modename>3"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
- (unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "wa")
- (unspec:OO
- [(match_operand:OO 2 "vsx_register_operand" "wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- VPAIR_FP_BINARY))]
- "TARGET_MMA"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MINUS))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
;; Vector pair fused-multiply (FMA) operations. The last argument in the
;; UNSPEC is a CONST_INT which identifies what the scalar element is.
@@ -379,202 +254,3 @@
}
[(set_attr "length" "8")
(set_attr "type" "<vpair_type>")])
-
-;; Optimize vector pair multiply and vector pair add into vector pair fma,
-;; providing the compiler would do this optimization for scalar and vectors.
-;; Unlike most of the define_insn_and_splits, this can be done before register
-;; allocation.
-(define_insn_and_split "*vpair_fma_<vpair_modename>_merge"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_PLUS))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
-
-;; Merge multiply and subtract.
-(define_insn_and_split "*vpair_fma_<vpair_modename>_merge"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MINUS))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (unspec:OO
- [(match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
-
-(define_insn_and_split "*vpair_fma_<vpair_modename>_merge2"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (unspec:OO
- [(match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_PLUS))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (unspec:OO
- [(match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
-
-;; Merge negate, multiply, and add.
-(define_insn_and_split "*vpair_nfma_<vpair_modename>_merge"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_PLUS)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
-
-;; Merge negate, multiply, and subtract.
-(define_insn_and_split "*vpair_nfms_<vpair_modename>_merge"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MINUS)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (unspec:OO
- [(match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
-
-(define_insn_and_split "*vpair_nfms_<vpair_modename>_merge2"
- [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
- (unspec:OO
- [(unspec:OO
- [(unspec:OO
- [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
- (match_operand:OO 2 "vsx_register_operand" "wa,0")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_MULT)
- (unspec:OO
- [(match_operand:OO 3 "vsx_register_operand" "0,wa")
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_PLUS)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
- "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
- "#"
- "&& 1"
- [(set (match_dup 0)
- (unspec:OO
- [(unspec:OO
- [(match_dup 1)
- (match_dup 2)
- (unspec:OO
- [(match_dup 3)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_FMA)
- (const_int VPAIR_FP_ELEMENT)]
- UNSPEC_VPAIR_NEG))]
-{
-}
- [(set_attr "length" "8")
- (set_attr "type" "<vpair_type>")])
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 43893d74415..e3b2090ef18 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -24206,13 +24206,6 @@ The @code{nfma} built-in is a combination of
@code{neg} of the
The @code{nfms} built-in is a combination of @code{neg} of the
@code{fms} built-in.
-The following built-in function is independent on the type of the
-underlying vector:
-
-@smallexample
-__vector_pair __builtin_vpair_zero ();
-@end smallexample
-
The following built-in functions operate on pairs of
@code{vector float} values:
@@ -24233,7 +24226,6 @@ __vector_pair __builtin_vpair_f32_nfma (__vector_pair,
__vector_pair,
__vector_pair);
__vector_pair __builtin_vpair_f32_nfms (__vector_pair, __vector_pair,
__vector_pair);
-__vector_pair __builtin_vpair_f32_splat (float);
__vector_pair __builtin_vpair_f32_sub (__vector_pair, __vector_pair);
@end smallexample
@@ -24257,7 +24249,6 @@ __vector_pair __builtin_vpair_f64_nfma (__vector_pair,
__vector_pair,
__vector_pair);
__vector_pair __builtin_vpair_f64_nfms (__vector_pair, __vector_pair,
__vector_pair);
-__vector_pair __builtin_vpair_f64_splat (double);
__vector_pair __builtin_vpair_f64_sub (__vector_pair, __vector_pair);
@end smallexample
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-10.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-10.c
deleted file mode 100644
index d2ee4dd0dd9..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-10.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -Ofast -ffp-contract=fast" } */
-
-/* Test whether the vector builtin code merges multiply, add/subtract, and
- negate into fma operations. */
-
-void
-test_fma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmadd{a,m}sp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- *p = __builtin_vpair_f32_add (mul, *s);
-}
-
-void
-test_fms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmsub{a,m}sp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f32_neg (*s);
- *p = __builtin_vpair_f32_add (mul, neg);
-}
-
-void
-test_nfma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvnmadd{a,m}sp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair muladd = __builtin_vpair_f32_add (mul, *s);
- *p = __builtin_vpair_f32_neg (muladd);
-}
-
-void
-test_nfms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvnmsub{a,m}sp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f32_neg (*s);
- __vector_pair muladd = __builtin_vpair_f32_add (mul, neg);
- *p = __builtin_vpair_f32_neg (muladd);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvmadd.sp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvmsub.sp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvnmadd.sp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvnmsub.sp\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-11.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-11.c
deleted file mode 100644
index e635b599aed..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-11.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2 -ffp-contract=off" } */
-
-/* Test whether the vector builtin code do not merge multiply, add/subtract,
- and negate into fma operations if -ffp-contract is off. */
-
-void
-test_fma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmuldp, 2 xvadddp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- *p = __builtin_vpair_f64_add (mul, *s);
-}
-
-void
-test_fms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmuldp, 2 xvsubdp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f64_neg (*s);
- *p = __builtin_vpair_f64_add (mul, neg);
-}
-
-void
-test_nfma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmuldp, 2 xvadddp, 2 xvnegdp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair muladd = __builtin_vpair_f64_add (mul, *s);
- *p = __builtin_vpair_f64_neg (muladd);
-}
-
-void
-test_nfms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmuldp, 2 xvsubdp, 2 xvnegdp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f64_neg (*s);
- __vector_pair muladd = __builtin_vpair_f64_add (mul, neg);
- *p = __builtin_vpair_f64_neg (muladd);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvadddp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvmuldp\M} 8 } } */
-/* { dg-final { scan-assembler-times {\mxvnegdp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvsubdp\M} 4 } } */
-/* { dg-final { scan-assembler-not {\mxvmadd.dp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvmsub.dp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnmadd.dp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnmsub.dp\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-12.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-12.c
deleted file mode 100644
index 4997279473e..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-12.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2 -ffp-contract=off" } */
-
-/* Test whether the vector builtin code do not merge multiply, add/subtract,
- and negate into fma operations if -ffp-contract is off. */
-
-void
-test_fma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmulsp, 2 xvaddsp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- *p = __builtin_vpair_f32_add (mul, *s);
-}
-
-void
-test_fms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmulsp, 2 xvsubsp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f32_neg (*s);
- *p = __builtin_vpair_f32_add (mul, neg);
-}
-
-void
-test_nfma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmulsp, 2 xvaddsp, 2 xvnegsp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair muladd = __builtin_vpair_f32_add (mul, *s);
- *p = __builtin_vpair_f32_neg (muladd);
-}
-
-void
-test_nfms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmulsp, 2 xvsubsp, 2 xvnegsp, stxvp. */
- __vector_pair mul = __builtin_vpair_f32_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f32_neg (*s);
- __vector_pair muladd = __builtin_vpair_f32_add (mul, neg);
- *p = __builtin_vpair_f32_neg (muladd);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvaddsp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvmulsp\M} 8 } } */
-/* { dg-final { scan-assembler-times {\mxvnegsp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvsubsp\M} 4 } } */
-/* { dg-final { scan-assembler-not {\mxvmadd.sp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvmsub.sp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnmadd.sp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnmsub.sp\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-5.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-5.c
deleted file mode 100644
index 9b645e626e1..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-5.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-
-/* Test whether the vector builtin code generates the expected instructions for
- vector pairs zero and splat functions for vector pairs containing
- doubles. */
-
-void
-test_zero (__vector_pair *p)
-{
- /* 2 xxspltib/xxlxor. */
- *p = __builtin_vpair_zero ();
-}
-
-void
-test_splat_zero (__vector_pair *p)
-{
- /* 2 xxspltib/xxlxor. */
- *p = __builtin_vpair_f64_splat (0.0);
-}
-
-void
-test_splat_one (__vector_pair *p)
-{
- /* xxspltidp, xxlor. */
- *p = __builtin_vpair_f64_splat (1.0);
-}
-
-void
-test_splat_pi (__vector_pair *p)
-{
- /* plxv, xxlor (note, we cannot use xxspltidp). */
- *p = __builtin_vpair_f64_splat (3.1415926535);
-}
-
-void
-test_splat_arg (__vector_pair *p, double x)
-{
- /* xxpermdi, xxlor. */
- *p = __builtin_vpair_f64_splat (x);
-}
-
-void
-test_splat_mem (__vector_pair *p, double *q)
-{
- /* lxvdsx, xxlor. */
- *p = __builtin_vpair_f64_splat (*q);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvdsx\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mp?lxvx?\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mxxspltib\M|\mxxlxor\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxxspltidp\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-6.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-6.c
deleted file mode 100644
index 5ec53d4bfc3..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-6.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-
-/* Test whether the vector builtin code generates the expected instructions for
- vector pairs zero and splat functions for vector pairs containing
- floats. */
-
-void
-test_zero (__vector_pair *p)
-{
- /* 2 xxspltib/xxlxor. */
- *p = __builtin_vpair_zero ();
-}
-
-void
-test_splat_zero (__vector_pair *p)
-{
- /* 2 xxspltib/xxlxor. */
- *p = __builtin_vpair_f32_splat (0.0f);
-}
-
-void
-test_splat_one (__vector_pair *p)
-{
- /* xxspltiw, xxlor. */
- *p = __builtin_vpair_f32_splat (1.0f);
-}
-
-void
-test_splat_pi (__vector_pair *p)
-{
- /* xxspltiw, xxlor. */
- *p = __builtin_vpair_f32_splat (3.1415926535f);
-}
-
-void
-test_splat_arg (__vector_pair *p, float x)
-{
- /* xscvdpspn, xxspltw, xxlor. */
- *p = __builtin_vpair_f32_splat (x);
-}
-
-void
-test_splat_mem (__vector_pair *p, float *q)
-{
- /* xlvwsx, xxlor. */
- *p = __builtin_vpair_f32_splat (*q);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvwsx\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 6 } } */
-/* { dg-final { scan-assembler-times {\mxscvdpspn\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mxxspltib\M|\mxxlxor\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxxspltiw\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxxspltw\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-7.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-7.c
deleted file mode 100644
index 51a400cb4b3..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-7.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-
-/* Test whether the vector builtin code merges plus and neg into a minus
- operation. */
-
-void
-test_minus (__vector_pair *p, __vector_pair *q, __vector_pair *r)
-{
- *p = __builtin_vpair_f64_add (*q, __builtin_vpair_f64_neg (*r));
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mxvsubdp\M} 2 } } */
-/* { dg-final { scan-assembler-not {\mxvadddp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnegdp\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-8.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-8.c
deleted file mode 100644
index 67957e3bdea..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-
-/* Test whether the vector builtin code merges plus and neg into a minus
- operation. */
-
-void
-test_minus (__vector_pair *p, __vector_pair *q, __vector_pair *r)
-{
- *p = __builtin_vpair_f32_add (*q, __builtin_vpair_f32_neg (*r));
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mxvsubsp\M} 2 } } */
-/* { dg-final { scan-assembler-not {\mxvaddsp\M} } } */
-/* { dg-final { scan-assembler-not {\mxvnegsp\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vector-pair-9.c
b/gcc/testsuite/gcc.target/powerpc/vector-pair-9.c
deleted file mode 100644
index eacf8dae9d8..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vector-pair-9.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -Ofast -ffp-contract=fast" } */
-
-/* Test whether the vector builtin code merges multiply, add/subtract, and
- negate into fma operations. */
-
-void
-test_fma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmadd{a,m}dp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- *p = __builtin_vpair_f64_add (mul, *s);
-}
-
-void
-test_fms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvmsub{a,m}dp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f64_neg (*s);
- *p = __builtin_vpair_f64_add (mul, neg);
-}
-
-void
-test_nfma (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvnmadd{a,m}dp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair muladd = __builtin_vpair_f64_add (mul, *s);
- *p = __builtin_vpair_f64_neg (muladd);
-}
-
-void
-test_nfms (__vector_pair *p,
- __vector_pair *q,
- __vector_pair *r,
- __vector_pair *s)
-{
- /* lxvp, 2 xvnmsub{a,m}dp, stxvp. */
- __vector_pair mul = __builtin_vpair_f64_mul (*q, *r);
- __vector_pair neg = __builtin_vpair_f64_neg (*s);
- __vector_pair muladd = __builtin_vpair_f64_add (mul, neg);
- *p = __builtin_vpair_f64_neg (muladd);
-}
-
-/* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
-/* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxvmadd.dp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvmsub.dp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvnmadd.dp\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mxvnmsub.dp\M} 2 } } */
