The branch 'meissner/heads/work176' was updated to point to: 248fc70e14e... Merge commit 'refs/users/meissner/heads/work176' of git+ssh
It previously pointed to: 5f249111a45... Revert changes Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): ------------------------------------------------------------------- 5f24911... Revert changes 11f9bbc... RFC2677-Add xvrlw support. 0db29e6... RFC2686-Add paddis support. 2513492... RFC2655-Add saturating subtract built-ins. 56a9db5... RFC2656-Support load/store vector with right length. 9bb7924... RFC2653-PowerPC: Add support for 1,024 bit DMR registers. 42a51bf... RFC2653-Add dense math test for new instruction names. 6a73439... RFC2653-Add support for dense math registers. 2f6844a... RFC2653-Add support for dense math registers. 5b68a1c... RFC2653-Add wD constraint. 3548ae9... Use vector pair load/store for memcpy with -mcpu=future fa18267... Revert changes 6cc817c... RFC2653-PowerPC: Add support for 1,024 bit DMR registers. 5337baa... RFC2653-Add dense math test for new instruction names. b994c1d... RFC2653-PowerPC: Switch to dense math names for all MMA ope 8e99964... RFC2653-Add support for dense math registers. 0d4fd03... Use vector pair load/store for memcpy with -mcpu=future
