[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: testsuite: xtheadfmemidx: Rename test and add similar Zfa test

[Jeff Law via Gcc-cvs]

https://gcc.gnu.org/g:fef123664d31ed2ccb29693a8345a72e209da6c4

commit fef123664d31ed2ccb29693a8345a72e209da6c4
Author: Christoph Müllner <christoph.muell...@vrull.eu>
Date:   Tue Aug 6 07:24:07 2024 +0200

    RISC-V: testsuite: xtheadfmemidx: Rename test and add similar Zfa test
    
    Test file xtheadfmemidx-medany.c has been added in b79cd204c780 as a
    test case that provoked an ICE when loading DFmode registers via two
    SImode register loads followed by a SI->DF[63:32] move from XTheadFmv.
    Since Zfa is affected in the same way as XTheadFmv, even if both
    have slightly different instructions, let's add a test for Zfa as well
    and give the tests proper names.
    
    Let's also add a test into the test files that counts the SI->DF moves
    from XTheadFmv/Zfa.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/xtheadfmemidx-medany.c: Move to...
            * gcc.target/riscv/xtheadfmemidx-xtheadfmv-medany.c: ...here.
            * gcc.target/riscv/xtheadfmemidx-zfa-medany.c: New test.
    
    Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu>
    (cherry picked from commit 8e6bc6dd2bb476fa97586b477bc98c670a3fcaf0)

Diff:
---
 ...x-medany.c => xtheadfmemidx-xtheadfmv-medany.c} |  5 +--
 .../gcc.target/riscv/xtheadfmemidx-zfa-medany.c    | 39 ++++++++++++++++++++++
 2 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-medany.c 
b/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-xtheadfmv-medany.c
similarity index 71%
rename from gcc/testsuite/gcc.target/riscv/xtheadfmemidx-medany.c
rename to gcc/testsuite/gcc.target/riscv/xtheadfmemidx-xtheadfmv-medany.c
index 0c8060d0632..7c70b775824 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-medany.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-xtheadfmv-medany.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
-/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-O3" "-Og" "-Os" "-Oz"} } */
-/* { dg-options "-march=rv32gc_xtheadfmemidx_xtheadfmv_xtheadmemidx 
-mabi=ilp32d -mcmodel=medany -O2" } */
+/* { dg-skip-if "" { *-*-* } { "-flto" "-O0" "-O1" "-Og" "-Os" "-Oz" } } */
+/* { dg-options "-march=rv32gc_xtheadfmemidx_xtheadfmv_xtheadmemidx 
-mabi=ilp32d -mcmodel=medany" } */
 
 typedef union {
   double v;
@@ -36,3 +36,4 @@ double foo (int i, int j)
 }
 
 /* { dg-final { scan-assembler-times {\mth\.flrd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mth\.fmv\.hw\.x\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-zfa-medany.c 
b/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-zfa-medany.c
new file mode 100644
index 00000000000..4215eab1195
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/xtheadfmemidx-zfa-medany.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-flto" "-O0" "-O1" "-Og" "-Os" "-Oz" } } */
+/* { dg-options "-march=rv32gc_zfa_xtheadfmemidx_xtheadmemidx -mabi=ilp32d 
-mcmodel=medany" } */
+
+typedef union {
+  double v;
+  unsigned w;
+} my_t;
+
+double z;
+
+double foo (int i, int j)
+{
+
+  if (j)
+    {
+      switch (i)
+       {
+       case 0:
+         return 1;
+       case 1:
+         return 0;
+       case 2:
+         return 3.0;
+       }
+    }
+
+  if (i == 1)
+    {
+      my_t u;
+      u.v = z;
+      u.w = 1;
+      z = u.v;
+    }
+  return z;
+}
+
+/* { dg-final { scan-assembler-times {\mth\.flrd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfmvp\.d\.x\M} 3 } } */