https://gcc.gnu.org/g:3673b7054ec268c445620b9c52d25e65bc9a7f96

commit r15-2937-g3673b7054ec268c445620b9c52d25e65bc9a7f96
Author: Richard Sandiford <richard.sandif...@arm.com>
Date:   Thu Aug 15 16:54:03 2024 +0100

    Tweak base/index disambiguation in decompose_normal_address [PR116236]
    
    The PR points out that, for an address like:
    
      (plus (zero_extend X) Y)
    
    decompose_normal_address doesn't establish a strong preference
    between treating X as the base or Y as the base.  As the comment
    in the patch says, zero_extend isn't enough on its own to assume
    an index, at least not on POINTERS_EXTEND_UNSIGNED targets.
    But in a construct like the one above, X and Y have different modes,
    and it seems reasonable to assume that the one with the expected
    address mode is the base.
    
    This matters on targets like m68k that support index extension
    and that require different classes for bases and indices.
    
    gcc/
            PR middle-end/116236
            * rtlanal.cc (decompose_normal_address): Try to distinguish
            bases and indices based on mode, before resorting to "baseness".

Diff:
---
 gcc/rtlanal.cc | 40 ++++++++++++++++++++++++++++------------
 1 file changed, 28 insertions(+), 12 deletions(-)

diff --git a/gcc/rtlanal.cc b/gcc/rtlanal.cc
index 4158a531bdd..71207ee4f41 100644
--- a/gcc/rtlanal.cc
+++ b/gcc/rtlanal.cc
@@ -6724,20 +6724,36 @@ decompose_normal_address (struct address_info *info)
     }
   else if (out == 2)
     {
+      auto address_mode = targetm.addr_space.address_mode (info->as);
+      rtx inner_op0 = *inner_ops[0];
+      rtx inner_op1 = *inner_ops[1];
+      int base;
+      /* If one inner operand has the expected mode for a base and the other
+        doesn't, assume that the other one is the index.  This is useful
+        for addresses such as:
+
+          (plus (zero_extend X) Y)
+
+        zero_extend is not in itself enough to assume an index, since bases
+        can be zero-extended on POINTERS_EXTEND_UNSIGNED targets.  But if
+        Y has address mode and X doesn't, there should be little doubt that
+        Y is the base.  */
+      if (GET_MODE (inner_op0) == address_mode
+         && GET_MODE (inner_op1) != address_mode)
+       base = 0;
+      else if (GET_MODE (inner_op1) == address_mode
+              && GET_MODE (inner_op0) != address_mode)
+       base = 1;
       /* In the event of a tie, assume the base comes first.  */
-      if (baseness (*inner_ops[0], info->mode, info->as, PLUS,
-                   GET_CODE (*ops[1]))
-         >= baseness (*inner_ops[1], info->mode, info->as, PLUS,
-                      GET_CODE (*ops[0])))
-       {
-         set_address_base (info, ops[0], inner_ops[0]);
-         set_address_index (info, ops[1], inner_ops[1]);
-       }
+      else if (baseness (inner_op0, info->mode, info->as, PLUS,
+                        GET_CODE (*ops[1]))
+              >= baseness (inner_op1, info->mode, info->as, PLUS,
+                           GET_CODE (*ops[0])))
+       base = 0;
       else
-       {
-         set_address_base (info, ops[1], inner_ops[1]);
-         set_address_index (info, ops[0], inner_ops[0]);
-       }
+       base = 1;
+      set_address_base (info, ops[base], inner_ops[base]);
+      set_address_index (info, ops[1 - base], inner_ops[1 - base]);
     }
   else
     gcc_assert (out == 0);

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