[gcc/devel/omp/gcc-14] amdgcn: Fix VGPR max count

[Andrew Stubbs via Gcc-cvs]

https://gcc.gnu.org/g:6d3c68ff05cf2b681c68db8dd0e2936cc34f2c40

commit 6d3c68ff05cf2b681c68db8dd0e2936cc34f2c40
Author: Andrew Stubbs <a...@baylibre.com>
Date:   Wed Aug 7 15:35:18 2024 +0000

    amdgcn: Fix VGPR max count
    
    The metadata for RDNA3 kernels allocates VGPRs in blocks of 12, which means 
the
    maximum usable number of registers is 252.  This patch prevents the compiler
    from exceeding this artifical limit.
    
    gcc/ChangeLog:
    
            * config/gcn/gcn.cc (gcn_conditional_register_usage): Fix registers
            remaining after maximum allocation using TARGET_VGPR_GRANULARITY.
    
    (cherry picked from commit 715317331994d3d69395056f77bfe7ac613af009)

Diff:
---
 gcc/config/gcn/gcn.cc | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 4c212e248764..e5fc05afbf86 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -2492,6 +2492,16 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t 
rclass,
 static void
 gcn_conditional_register_usage (void)
 {
+  /* Some architectures have a register allocation granularity that does not
+     permit use of the full register count.  */
+  int vgpr_block_size = (TARGET_RDNA3 ? 12
+                        : TARGET_RDNA2_PLUS || TARGET_CDNA2_PLUS ? 8
+                        : 4);
+  for (int i = 256 - (256 % vgpr_block_size);
+       i < 256;
+       i++)
+    fixed_regs[VGPR_REGNO (i)] = call_used_regs[VGPR_REGNO (i)] = 1;
+
   if (!cfun || !cfun->machine)
     return;