https://gcc.gnu.org/g:1f24b2b913ab7c1d330c9815432a457e8082f136
commit 1f24b2b913ab7c1d330c9815432a457e8082f136
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Wed Jul 31 23:03:19 2024 -0400
Change TARGET_POPCNTB to TARGET_POWER5
As part of the architecture flags patches, this patch changes the use of
TARGET_POPCNTB to TARGET_POWER5. The POPCNTB instruction was added in ISA
2.02
(power5).
2024-07-31 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
TARGET_POWER5 instead of TARGET_POPCNTB.
* config/rs6000/rs6000.h (TARGET_POWER5): New macro.
(TARGET_EXTRA_BUILTINS): Use TARGET_POWER5 instead of
TARGET_POPCNTB.
(TARGET_FRE): Likewise.
(TARGET_FRSQRTES): Likewise.
* config/rs6000/rs6000.md (enabled attribute): Likewise.
(popcount<mode>): Use TARGET_POWER5 instead of TARGET_POPCNTB. Drop
test for TARGET_POPCNTD (i.e power7), since TARGET_POPCNTB will
always
be set if TARGET_POPCNTD is set.
(popcntb<mode>2): Use TARGET_POWER5 instead of TARGET_POPCNTB.
(parity<mode>2): Likewise.
(parity<mode>2_cmpb): Remove TARGET_POPCNTB test, since it will
always
be true when TARGET_CMPB (i.e. power6) is set.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 2 +-
gcc/config/rs6000/rs6000.h | 14 ++++++++------
gcc/config/rs6000/rs6000.md | 10 +++++-----
3 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc
b/gcc/config/rs6000/rs6000-builtin.cc
index 099cbc822459..ba2eba15378e 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -155,7 +155,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins
fncode)
case ENB_ALWAYS:
return true;
case ENB_P5:
- return TARGET_POPCNTB;
+ return TARGET_POWER5;
case ENB_P6:
return TARGET_CMPB;
case ENB_P6_64:
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index f011fa2523c0..5e77962f70b2 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -520,9 +520,11 @@ extern int rs6000_vector_align[];
#define MASK_LITTLE_ENDIAN OPTION_MASK_LITTLE_ENDIAN
#endif
-/* In the past we represented power8, power10 as an ISA bit and used internal
- switches the user was not supposed to use for -mpower8-internal and
- -mpower10. Now we use architecture flags for this. */
+/* In the past we represented the various power cpus (power4, power5, power6,
+ etc.) via ISA bits that highlighted a new instruction or we used an extra
+ option to represent the hardware (i.e. -mpower8-internal or -mpower10). Now
+ we use architecture flags for this. */
+#define TARGET_POWER5 ((rs6000_arch_flags & ARCH_MASK_POWER5) != 0)
#define TARGET_POWER8 ((rs6000_arch_flags & ARCH_MASK_POWER8) != 0)
#define TARGET_POWER10 ((rs6000_arch_flags & ARCH_MASK_POWER10) != 0)
@@ -533,7 +535,7 @@ extern int rs6000_vector_align[];
#define TARGET_EXTRA_BUILTINS (TARGET_POWERPC64 \
|| TARGET_PPC_GPOPT /* 970/power4 */ \
- || TARGET_POPCNTB /* ISA 2.02 */ \
+ || TARGET_POWER5 /* ISA 2.02 */ \
|| TARGET_CMPB /* ISA 2.05 */ \
|| TARGET_POPCNTD /* ISA 2.06 */ \
|| TARGET_ALTIVEC \
@@ -549,9 +551,9 @@ extern int rs6000_vector_align[];
#define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT)
#define TARGET_FRE (TARGET_HARD_FLOAT \
- && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode)))
+ && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode)))
-#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POPCNTB \
+#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POWER5 \
&& TARGET_PPC_GFXOPT)
#define TARGET_FRSQRTE (TARGET_HARD_FLOAT \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index cfb22a3cb7da..4fe6e34412aa 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -365,7 +365,7 @@
(const_int 1)
(and (eq_attr "isa" "p5")
- (match_test "TARGET_POPCNTB"))
+ (match_test "TARGET_POWER5"))
(const_int 1)
(and (eq_attr "isa" "p6")
@@ -2475,7 +2475,7 @@
(define_expand "popcount<mode>2"
[(set (match_operand:GPR 0 "gpc_reg_operand")
(popcount:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
- "TARGET_POPCNTB || TARGET_POPCNTD"
+ "TARGET_POWER5"
{
rs6000_emit_popcount (operands[0], operands[1]);
DONE;
@@ -2485,7 +2485,7 @@
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
UNSPEC_POPCNTB))]
- "TARGET_POPCNTB"
+ "TARGET_POWER5"
"popcntb %0,%1"
[(set_attr "type" "popcnt")])
@@ -2500,7 +2500,7 @@
(define_expand "parity<mode>2"
[(set (match_operand:GPR 0 "gpc_reg_operand")
(parity:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
- "TARGET_POPCNTB"
+ "TARGET_POWER5"
{
rs6000_emit_parity (operands[0], operands[1]);
DONE;
@@ -2509,7 +2509,7 @@
(define_insn "parity<mode>2_cmpb"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
UNSPEC_PARITY))]
- "TARGET_CMPB && TARGET_POPCNTB"
+ "TARGET_CMPB"
"prty<wd> %0,%1"
[(set_attr "type" "popcnt")])
