https://gcc.gnu.org/g:00570ace830d9e811e74752afc14c6d1640fc053
commit 00570ace830d9e811e74752afc14c6d1640fc053 Author: Michael Meissner <meiss...@linux.ibm.com> Date: Wed Jul 31 12:24:41 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index ce7ed892daf3..a40533cb986a 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,19 @@ +==================== Branch work174, patch #11 ==================== + +Add power5+ to arch flags. + +2024-07-31 Michael Meissner <meiss...@linux.ibm.com> + +gcc/ + + * config/rs6000/rs6000-arch.def (ARCH_MASK_POWER5X): Add power5+ + support. + * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use arch + masks for power4, power5, power5+, and power6. + * config/rs6000/rs6000.cc (get_arch_flags): Add support for setting arch + flags for non power* processors. Add support for power5+. + (report_architecture_mismatch): Improve error message. + ==================== Branch work174, patch #10 ==================== Use const HOST_WIDE_INT for arch masks.