[gcc r14-10433] [alpha] adjust MEM alignment for block move [PR115459]

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:c8fdef7fc25dafc8c7a12727c1046b3c7f2b89bb

commit r14-10433-gc8fdef7fc25dafc8c7a12727c1046b3c7f2b89bb
Author: Alexandre Oliva <ol...@adacore.com>
Date:   Tue Jul 16 08:54:20 2024 -0300

    [alpha] adjust MEM alignment for block move [PR115459]
    
    Before issuing loads or stores for a block move, adjust the MEM
    alignments if analysis of the addresses enabled the inference of
    stricter alignment.  This ensures that the MEMs are sufficiently
    aligned for the corresponding insns, which avoids trouble in case of
    e.g. substitutions into SUBREGs.
    
    
    for  gcc/ChangeLog
    
            PR target/115459
            * config/alpha/alpha.cc (alpha_expand_block_move): Adjust
            MEMs to match inferred alignment.
    
    (cherry picked from commit ccfe7151803956d178947d0afda0bd66ce097275)

Diff:
---
 gcc/config/alpha/alpha.cc | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/gcc/config/alpha/alpha.cc b/gcc/config/alpha/alpha.cc
index 1126cea1f7ba..e090e74b9d07 100644
--- a/gcc/config/alpha/alpha.cc
+++ b/gcc/config/alpha/alpha.cc
@@ -3820,6 +3820,12 @@ alpha_expand_block_move (rtx operands[])
           else if (a >= 16 && c % 2 == 0)
            src_align = 16;
        }
+
+      if (MEM_P (orig_src) && MEM_ALIGN (orig_src) < src_align)
+       {
+         orig_src = shallow_copy_rtx (orig_src);
+         set_mem_align (orig_src, src_align);
+       }
     }
 
   tmp = XEXP (orig_dst, 0);
@@ -3841,6 +3847,12 @@ alpha_expand_block_move (rtx operands[])
           else if (a >= 16 && c % 2 == 0)
            dst_align = 16;
        }
+
+      if (MEM_P (orig_dst) && MEM_ALIGN (orig_dst) < dst_align)
+       {
+         orig_dst = shallow_copy_rtx (orig_dst);
+         set_mem_align (orig_dst, dst_align);
+       }
     }
 
   ofs = 0;