[gcc r15-2052] i386: extend trunc{128}2{16,32,64}'s scope.

[Hu via Gcc-cvs]

https://gcc.gnu.org/g:a902e35396d68f10bd27477153fafa4f5ac9c319

commit r15-2052-ga902e35396d68f10bd27477153fafa4f5ac9c319
Author: Hu, Lin1 <lin1...@intel.com>
Date:   Thu Jul 11 15:03:22 2024 +0800

    i386: extend trunc{128}2{16,32,64}'s scope.
    
    Based on actual usage, trunc{128}2{16,32,64} use some instructions from
    sse/sse3, so extend their scope to extend the scope of optimization.
    
    gcc/ChangeLog:
    
            PR target/107432
            * config/i386/sse.md
            (PMOV_SRC_MODE_3_AVX2): Add TARGET_AVX2 for V4DI and V8SI.
            (PMOV_SRC_MODE_4): Add TARGET_AVX2 for V4DI.
            (trunc<mode><pmov_dst_3_lower>2): Change constraint from 
TARGET_AVX2 to
            TARGET_SSSE3.
            (trunc<mode><pmov_dst_4_lower>2): Ditto.
            (truncv2div2si2): Change constraint from TARGET_AVX2 to TARGET_SSE.
    
    gcc/testsuite/ChangeLog:
    
            PR target/107432
            * gcc.target/i386/pr107432-10.c: New test.

Diff:
---
 gcc/config/i386/sse.md                      | 11 ++++----
 gcc/testsuite/gcc.target/i386/pr107432-10.c | 41 +++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+), 5 deletions(-)

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index c134494cd200..e44822f705b4 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15000,7 +15000,8 @@
   "TARGET_AVX512VL")
 
 (define_mode_iterator PMOV_SRC_MODE_3 [V4DI V2DI V8SI V4SI (V8HI 
"TARGET_AVX512BW")])
-(define_mode_iterator PMOV_SRC_MODE_3_AVX2 [V4DI V2DI V8SI V4SI V8HI])
+(define_mode_iterator PMOV_SRC_MODE_3_AVX2
+ [(V4DI "TARGET_AVX2") V2DI (V8SI "TARGET_AVX2") V4SI V8HI])
 (define_mode_attr pmov_dst_3_lower
   [(V4DI "v4qi") (V2DI "v2qi") (V8SI "v8qi") (V4SI "v4qi") (V8HI "v8qi")])
 (define_mode_attr pmov_dst_3
@@ -15014,7 +15015,7 @@
   [(set (match_operand:<pmov_dst_3> 0 "register_operand")
        (truncate:<pmov_dst_3>
          (match_operand:PMOV_SRC_MODE_3_AVX2 1 "register_operand")))]
-  "TARGET_AVX2"
+  "TARGET_SSSE3"
 {
   if (TARGET_AVX512VL
       && (<MODE>mode != V8HImode || TARGET_AVX512BW))
@@ -15390,7 +15391,7 @@
          (match_dup 2)))]
   "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);")
 
-(define_mode_iterator PMOV_SRC_MODE_4 [V4DI V2DI V4SI])
+(define_mode_iterator PMOV_SRC_MODE_4 [(V4DI "TARGET_AVX2") V2DI V4SI])
 (define_mode_attr pmov_dst_4
   [(V4DI "V4HI") (V2DI "V2HI") (V4SI "V4HI")])
 (define_mode_attr pmov_dst_4_lower
@@ -15404,7 +15405,7 @@
   [(set (match_operand:<pmov_dst_4> 0 "register_operand")
        (truncate:<pmov_dst_4>
          (match_operand:PMOV_SRC_MODE_4 1 "register_operand")))]
-  "TARGET_AVX2"
+  "TARGET_SSSE3"
 {
   if (TARGET_AVX512VL)
     {
@@ -15659,7 +15660,7 @@
   [(set (match_operand:V2SI 0 "register_operand")
        (truncate:V2SI
          (match_operand:V2DI 1 "register_operand")))]
-  "TARGET_AVX2"
+  "TARGET_SSE"
 {
   if (TARGET_AVX512VL)
     {
diff --git a/gcc/testsuite/gcc.target/i386/pr107432-10.c 
b/gcc/testsuite/gcc.target/i386/pr107432-10.c
new file mode 100644
index 000000000000..57edf7cfc781
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr107432-10.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-options "-march=x86-64-v2 -O2" } */
+/* { dg-final { scan-assembler-times "shufps" 1 } } */
+/* { dg-final { scan-assembler-times "pshufb" 5 } } */
+
+#include <x86intrin.h>
+
+typedef short __v2hi __attribute__ ((__vector_size__ (4)));
+typedef char __v2qi __attribute__ ((__vector_size__ (2)));
+typedef char __v4qi __attribute__ ((__vector_size__ (4)));
+typedef char __v8qi __attribute__ ((__vector_size__ (8)));
+
+__v2si mm_cvtepi64_epi32_builtin_convertvector(__v2di a)
+{
+  return __builtin_convertvector((__v2di)a, __v2si);
+}
+
+__v2hi mm_cvtepi64_epi16_builtin_convertvector(__m128i a)
+{
+  return __builtin_convertvector((__v2di)a, __v2hi);
+}
+
+__v4hi mm_cvtepi32_epi16_builtin_convertvector(__m128i a)
+{
+  return __builtin_convertvector((__v4si)a, __v4hi);
+}
+
+__v2qi mm_cvtepi64_epi8_builtin_convertvector(__m128i a)
+{
+  return __builtin_convertvector((__v2di)a, __v2qi);
+}
+
+__v4qi mm_cvtepi32_epi8_builtin_convertvector(__m128i a)
+{
+  return __builtin_convertvector((__v4si)a, __v4qi);
+}
+
+__v8qi mm_cvtepi16_epi8_builtin_convertvector(__m128i a)
+{
+  return __builtin_convertvector((__v8hi)a, __v8qi);
+}