[gcc r15-1851] Testsuite/MIPS: Fix msa.c: test7_v2f64, test7_v4f32, test43_v2i64

[YunQiang Su via Gcc-cvs]

https://gcc.gnu.org/g:33dfd6798aa3e5f8be58c8810f9814d57485fe12

commit r15-1851-g33dfd6798aa3e5f8be58c8810f9814d57485fe12
Author: YunQiang Su <s...@gcc.gnu.org>
Date:   Thu Jun 27 18:05:30 2024 +0800

    Testsuite/MIPS: Fix msa.c: test7_v2f64, test7_v4f32, test43_v2i64
    
    BNEGI.W/D are used for test7_v2f64 and test7_v4f32 now.  It is
    an improvment since that we can save a instruction.
    
    ILVR.D is used for test43_v2i64 now, instead of INSVE.D.
    
    gcc/testsuite
            * gcc.target/mips/msa.c: Fix test7_v2f64, test7_v4f32 and
            test43_v2i64.

Diff:
---
 gcc/testsuite/gcc.target/mips/msa.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/mips/msa.c 
b/gcc/testsuite/gcc.target/mips/msa.c
index b741f35556f..62d0606dfef 100644
--- a/gcc/testsuite/gcc.target/mips/msa.c
+++ b/gcc/testsuite/gcc.target/mips/msa.c
@@ -90,8 +90,8 @@
 /* { dg-final { scan-assembler-times "test7_v8u16:.*subv.h.*test7_v8u16" 1 } } 
*/
 /* { dg-final { scan-assembler-times "test7_v4u32:.*subv.w.*test7_v4u32" 1 } } 
*/
 /* { dg-final { scan-assembler-times "test7_v2u64:.*subv.d.*test7_v2u64" 1 } } 
*/
-/* { dg-final { scan-assembler-times "test7_v4f32:.*fsub.w.*test7_v4f32" 1 } } 
*/
-/* { dg-final { scan-assembler-times "test7_v2f64:.*fsub.d.*test7_v2f64" 1 } } 
*/
+/* { dg-final { scan-assembler-times "test7_v4f32:.*bnegi.w.*test7_v4f32" 1 } 
} */
+/* { dg-final { scan-assembler-times "test7_v2f64:.*bnegi.d.*test7_v2f64" 1 } 
} */
 /* { dg-final { scan-assembler-times "test8_v16i8:.*xor.v.*test8_v16i8" 1 } } 
*/
 /* { dg-final { scan-assembler-times "test8_v8i16:.*xor.v.*test8_v8i16" 1 } } 
*/
 /* { dg-final { scan-assembler-times "test8_v4i32:.*xor.v.*test8_v4i32" 1 } } 
*/
@@ -401,7 +401,7 @@
 /* { dg-final { scan-assembler-times "test43_v16i8:.*insve.b.*test43_v16i8" 1 
} } */
 /* { dg-final { scan-assembler-times "test43_v8i16:.*insve.h.*test43_v8i16" 1 
} } */
 /* { dg-final { scan-assembler-times "test43_v4i32:.*insve.w.*test43_v4i32" 1 
} } */
-/* { dg-final { scan-assembler-times "test43_v2i64:.*insve.d.*test43_v2i64" 1 
} } */
+/* { dg-final { scan-assembler-times "test43_v2i64:.*ilvr.d.*test43_v2i64" 1 } 
} */
 /* { dg-final { scan-assembler-times "test44_v16i8:.*copy_s.b.*test44_v16i8" 1 
} } */
 /* { dg-final { scan-assembler-times "test44_v8i16:.*copy_s.h.*test44_v8i16" 1 
} } */
 /* { dg-final { scan-assembler-times "test44_v4i32:.*copy_s.w.*test44_v4i32" 1 
} } */