https://gcc.gnu.org/g:142b5263b18be96e5d9ce406ad2c1b6ab35c190f

commit r15-1751-g142b5263b18be96e5d9ce406ad2c1b6ab35c190f
Author: Roger Sayle <ro...@nextmovesoftware.com>
Date:   Mon Jul 1 12:18:26 2024 +0100

    i386: Additional peephole2 to use lea in round-up integer division.
    
    A common idiom for implementing an integer division that rounds upwards is
    to write (x + y - 1) / y.  Conveniently on x86, the two additions to form
    the numerator can be performed by a single lea instruction, and indeed gcc
    currently generates a lea when both x and y are both registers.
    
    int foo(int x, int y) {
      return (x+y-1)/y;
    }
    
    generates with -O2:
    
    foo:    leal    -1(%rsi,%rdi), %eax     // 4 bytes
            cltd
            idivl   %esi
            ret
    
    Oddly, however, if x is a memory, gcc currently uses two instructions:
    
    int m;
    int bar(int y) {
      return (m+y-1)/y;
    }
    
    generates:
    
    foo:    movl    m(%rip), %eax
            addl    %edi, %eax              // 2 bytes
            subl    $1, %eax                // 3 bytes
            cltd
            idivl   %edi
            ret
    
    This discrepancy is caused by the late decision (in peephole2) to split
    an addition with a memory operand, into a load followed by a reg-reg
    addition.  This patch improves this situation by adding a peephole2
    to recognize consecutive additions and transform them into lea if
    profitable.
    
    My first attempt at fixing this was to use a define_insn_and_split:
    
    (define_insn_and_split "*lea<mode>3_reg_mem_imm"
      [(set (match_operand:SWI48 0 "register_operand")
           (plus:SWI48 (plus:SWI48 (match_operand:SWI48 1 "register_operand")
                                   (match_operand:SWI48 2 "memory_operand"))
                       (match_operand:SWI48 3 "x86_64_immediate_operand")))]
      "ix86_pre_reload_split ()"
      "#"
      "&& 1"
      [(set (match_dup 4) (match_dup 2))
       (set (match_dup 0) (plus:SWI48 (plus:SWI48 (match_dup 1) (match_dup 4))
                                     (match_dup 3)))]
      "operands[4] = gen_reg_rtx (<MODE>mode);")
    
    using combine to combine instructions.  Unfortunately, this approach
    interferes with (reload's) subtle balance of deciding when to use/avoid lea,
    which can be observed as a code size regression in CSiBE.  The peephole2
    approach (proposed here) uniformly improves CSiBE results.
    
    2024-07-01  Roger Sayle  <ro...@nextmovesoftware.com>
    
    gcc/ChangeLog
            * config/i386/i386.md (peephole2): Transform two consecutive
            additions into a 3-component lea if !TARGET_AVOID_LEA_FOR_ADDR.
    
    gcc/testsuite/ChangeLog
            * gcc.target/i386/lea-3.c: New test case.

Diff:
---
 gcc/config/i386/i386.md               | 15 +++++++++++++++
 gcc/testsuite/gcc.target/i386/lea-3.c | 13 +++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 59a889da304..0b6f6e75072 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6332,6 +6332,21 @@
   "TARGET_APX_NF && reload_completed"
   [(set (match_dup 0) (ashift:SWI48 (match_dup 0) (match_dup 1)))]
   "operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1])));")
+
+;; The peephole2 pass may expose consecutive additions suitable for lea.
+(define_peephole2
+  [(parallel [(set (match_operand:SWI48 0 "register_operand")
+                  (plus:SWI48 (match_dup 0)
+                              (match_operand 1 "register_operand")))
+             (clobber (reg:CC FLAGS_REG))])
+   (parallel [(set (match_dup 0)
+                  (plus:SWI48 (match_dup 0)
+                              (match_operand 2 "x86_64_immediate_operand")))
+             (clobber (reg:CC FLAGS_REG))])]
+  "!TARGET_AVOID_LEA_FOR_ADDR || optimize_function_for_size_p (cfun)"
+  [(set (match_dup 0) (plus:SWI48 (plus:SWI48 (match_dup 0)
+                                             (match_dup 1))
+                                 (match_dup 2)))])
 
 ;; Add instructions
 
diff --git a/gcc/testsuite/gcc.target/i386/lea-3.c 
b/gcc/testsuite/gcc.target/i386/lea-3.c
new file mode 100644
index 00000000000..84e66b00fc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/lea-3.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int m;
+
+int foo(int y)
+{
+  return (m+y-1)/y;
+}
+
+/* { dg-final { scan-assembler "leal" } } */
+/* { dg-final { scan-assembler-not "addl" } } */
+/* { dg-final { scan-assembler-not "subl" } } */

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