https://gcc.gnu.org/g:b8153b5417bed02f47354a14ad36100785dfdc47

commit r15-1673-gb8153b5417bed02f47354a14ad36100785dfdc47
Author: liuhongt <hongtao....@intel.com>
Date:   Mon Jun 24 17:53:22 2024 +0800

    Fix wrong cost of MEM when addr is a lea.
    
    416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0.
    The commit adjust rtx_cost of mem to reduce cost of (add op0 disp).
    But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea.
    It is the case in the PR, the patch adjust rtx_cost to only handle reg
    + disp, for other forms, they're basically all LEA which doesn't have
    additional cost of ADD.
    
    gcc/ChangeLog:
    
            PR target/115462
            * config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
            disp) just a little bit more than MEM (reg).
    
    gcc/testsuite/ChangeLog:
            * gcc.target/i386/pr115462.c: New test.

Diff:
---
 gcc/config/i386/i386.cc                  |  5 ++++-
 gcc/testsuite/gcc.target/i386/pr115462.c | 22 ++++++++++++++++++++++
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 1f71ed04be6..92e3c67112e 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -22154,7 +22154,10 @@ ix86_rtx_costs (rtx x, machine_mode mode, int 
outer_code_i, int opno,
             address_cost should be used, but it reduce cost too much.
             So current solution is make constant disp as cheap as possible.  */
          if (GET_CODE (addr) == PLUS
-             && x86_64_immediate_operand (XEXP (addr, 1), Pmode))
+             && x86_64_immediate_operand (XEXP (addr, 1), Pmode)
+             /* Only hanlde (reg + disp) since other forms of addr are mostly 
LEA,
+                there's no additional cost for the plus of disp.  */
+             && register_operand (XEXP (addr, 0), Pmode))
            {
              *total += 1;
              *total += rtx_cost (XEXP (addr, 0), Pmode, PLUS, 0, speed);
diff --git a/gcc/testsuite/gcc.target/i386/pr115462.c 
b/gcc/testsuite/gcc.target/i386/pr115462.c
new file mode 100644
index 00000000000..ad50a6382bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr115462.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx2 -fno-tree-vectorize -fno-pic" } */
+/* { dg-final { scan-assembler-times {(?n)movl[ \t]+.*, p1\.0\+[0-9]*\(,} 3 } 
} */
+
+int
+foo (long indx, long indx2, long indx3, long indx4, long indx5, long indx6, 
long n, int* q)
+{
+  static int p1[10000];
+  int* p2 = p1 + 1000;
+  int* p3 = p1 + 4000;
+  int* p4 = p1 + 8000;
+
+  for (long i = 0; i != n; i++)
+    {
+      /* scan for      movl    %edi, p1.0+3996(,%rax,4),
+        p1.0+3996 should be propagted into the loop.  */
+      p2[indx++] = q[indx++];
+      p3[indx2++] = q[indx2++];
+      p4[indx3++] = q[indx3++];
+    }
+  return p1[indx6] + p1[indx5];
+}

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