[gcc r15-1057] [APX] Adjust target-support check [PR 115341]

[Hongyu Wang via Gcc-cvs]

https://gcc.gnu.org/g:f46d54a2a76acb94356989fb187853e5b58c3098

commit r15-1057-gf46d54a2a76acb94356989fb187853e5b58c3098
Author: Hongyu Wang <hongyu.w...@intel.com>
Date:   Thu Jun 6 13:00:26 2024 +0800

    [APX] Adjust target-support check [PR 115341]
    
    Current target apxf check does not specify sub-features that assembler
    supports, so the check with older binutils will fail at assemble stage
    for new apx features like NF,CCMP or CFCMOV. Adjust the assembler check
    for all apx subfeatures.
    
    gcc/testsuite/ChangeLog:
    
            PR target/115341
            * lib/target-supports.exp (check_effective_target_apxf):
            Check for all apx sub-features.

Diff:
---
 gcc/testsuite/lib/target-supports.exp | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 4766104c6d8..5c0a3dade22 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -10451,7 +10451,13 @@ proc check_effective_target_apxf { } {
        void
        foo ()
        {
-         __asm__ volatile ("add\t%%r16, %%r31" ::);
+         __asm__ volatile ("movq\t%r16, %rax");
+         __asm__ volatile ("push2p\t%r15, %r14");
+         __asm__ volatile ("addq\t%r16, %r31, %r17");
+         __asm__ volatile ("{nf} addq\t%r16, %r31");
+         __asm__ volatile ("setzule\t%al");
+         __asm__ volatile ("cfcmoveq\t%r16, %r31");
+         __asm__ volatile ("ccmpleq\t{dfv=sf} %r16, %r31");
        }
     } "-mapxf" ]
 }