The branch 'riscv/heads/gcc-14-with-riscv-opts' was updated to point to:

 7f716ba0f6c... [to-be-committed] [RISC-V] Try inverting for constant synth

It previously pointed to:

 19868f0990e... [to-be-committed] [RISC-V] Try inverting for constant synth

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
-------------------------------------------------------------------

  19868f0... [to-be-committed] [RISC-V] Try inverting for constant synth
  f69c19f... [to-be-committed][RISC-V] Generate nearby constant, then ad
  fee06b9... [committed] [v2] More logical op simplifications in simplif
  a08b5d4... [to-be-committed,v2,RISC-V] Use bclri in constant synthesis
  4e981cc... RISC-V: Enable vectorization for vect-early-break_124-pr114
  106d603... RISC-V: avoid LUI based const mat in alloca epilogue expans
  259f9f2... RISC-V: avoid LUI based const mat in prologue/epilogue expa
  97fb62e... Regenerate riscv.opt.urls and i386.opt.urls
  5ef9011... DSE: Fix ICE after allow vector type in get_stored_val
  08aaf0d... [to-be-committed][RISC-V][PR target/115142] Do not create i
  1b074bd... RISC-V: Implement -m{,no}fence-tso
  03f61ba... [to-be-committed,RISC-V] Improve some shift-add sequences
  a544526... RISC-V: Fix "Nan-box the result of movbf on soft-bf16"
  af9118f... RISC-V: Modify _Bfloat16 to __bf16
  db2b829... RISC-V: Implement IFN SAT_ADD for both the scalar and vecto
  d6cb9a0... RISC-V: Add initial cost handling for segment loads/stores.
  17dfc97... internal-fn: Do not force vcond_mask operands to reg.
  586e678... RISC-V: Cleanup some temporally files [NFC]
  c1ad575... RISC-V: Enable vectorizable early exit testsuite
  b1aab03... RISC-V: Implement vectorizable early exit with vcond_mask_l
  4ec3a6b... Vect: Support loop len in vectorizable early exit
  674362d... Vect: Support new IFN SAT_ADD for unsigned vector int
  51b69c8... Internal-fn: Support new IFN SAT_ADD for unsigned scalar in
  faf2f9e... RISC-V: testsuite: Drop march-string in cmpmemsi/cpymemsi t
  67195fb... RISC-V: Add Zvfbfwma extension to the -march= option
  45c5684... Add missing hunk in recent change.
  72e6ff2... [v2,2/2] RISC-V: strcmp expansion: Use adjust_address() for
  d222257... [v2,1/2] RISC-V: Add cmpmemsi expansion
  f3d5808... RISC-V: Test cbo.zero expansion for rv32
  59e6343... RISC-V: Allow by-pieces to do overlapping accesses in block
  ad0413b... RISC-V: add tests for overlapping mem ops
  69408db... RISC-V: Allow unaligned accesses in cpymemsi expansion
  0dcd2d2... RISC-V: Add test cases for cpymem expansion
  75a0630... [committed] Fix rv32 issues with recent zicboz work
  9de3210... [to-be-committed,RISC-V] Remove redundant AND in shift-add 
  de257cc... RISC-V: avoid LUI based const materialization ... [part of 
  f9a0426... [PATCH 3/3] RISC-V: Add memset-zero expansion to cbo.zero
  0db572d... [PATCH 2/3] RISC-V: testsuite: Make cmo tests LTO safe
  5b00e29... [1/3] expr: Export clear_by_pieces()
  0c1a07d... RISC-V: Fix format issue for trailing operator [NFC]
  c6ed1bc... [to-be-committed,RISC-V] Improve AND with some constants
  7d135c5... RISC-V: Bugfix ICE for RVV intrinisc vfw on _Float16 scalar
  8be088a... [to-be-committed,RISC-V] Improve single inverted bit extrac
  71edaf6... [to-be-committed,RISC-V] Improve usage of slli.uw in consta
  a39fd3b... [to-be-committed] RISC-V Fix minor regression in synthesis 
  28db6a1... [RISC-V] Use shNadd for constant synthesis
  11c50b6... RISC-V: Fix typos in code or comment [NFC]
  13d1b47... [committed] [RISC-V] Provide splitting guidance to combine 
  788ed48... RISC-V: Make full-vec-move1.c test robust for optimization
  2bb25f9... RISC-V: Add tests for cpymemsi expansion
  b59bc76... [PATCH v1 1/1] RISC-V: Nan-box the result of movbf on soft-
  f273ad2... [RISC-V][V2] Fix incorrect if-then-else nesting of Zbs usag
  b6dc4a5... RISC-V: Cover sign-extensions in lshr<GPR:mode>3_zero_exten
  38fc117... RISC-V: Add zero_extract support for rv64gc
  9041a04... RISC-V: Cover sign-extensions in lshrsi3_zero_extend_2
  9a81321... RISC-V: Add test for sraiw-31 special case
  39c05d2... [committed][RISC-V] Turn on overlap_op_by_pieces for generi
  07f793b... [committed] [RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_
  8b5321b... [RISC-V] [PATCH v2] Enable inlining str* by default
  c396fa6... [PATCH 1/1] RISC-V: Add Zfbfmin extension to the -march= op
  cd0e329... RISC-V: Add testcase for PR114749.
  af9ec7b... [RISC-V] Add support for _Bfloat16
  6b0b012... RISC-V: Document -mcmodel=large
  3ccf8a5... So another constant synthesis improvement.
  3d0f38b... RISC-V: miscll comment fixes [NFC]
  9ba5c71... [committed][RISC-V] Fix nearbyint failure on rv32 and forma
  0099c20... [RFA][RISC-V] Improve constant synthesis for constants with
  63c91bf... [committed] [RISC-V] Don't run new rounding tests on newlib
  1985c80... [committed] [RISC-V] Trivial pattern cleanup
  305a5d2... [committed] [RISC-V] Fix detection of store pair fusion cas
  7fd192a... This is almost exclusively Jivan's work.  His original post
  48b653e... RISC-V: Refine the condition for add additional vars in RVV
  cd78056... RISC-V: Fix parsing of Zic* extensions
  96a6647... RISC-V: Add -X to link spec


Summary of changes (added commits):
-----------------------------------

  7f716ba... [to-be-committed] [RISC-V] Try inverting for constant synth
  dbd78bc... [to-be-committed][RISC-V] Generate nearby constant, then ad
  91f41ea... [committed] [v2] More logical op simplifications in simplif
  b6c9219... [to-be-committed,v2,RISC-V] Use bclri in constant synthesis
  cd9b981... RISC-V: Enable vectorization for vect-early-break_124-pr114
  d85def2... RISC-V: avoid LUI based const mat in alloca epilogue expans
  5f7595e... RISC-V: avoid LUI based const mat in prologue/epilogue expa
  e42956a... Regenerate riscv.opt.urls and i386.opt.urls
  98a4890... DSE: Fix ICE after allow vector type in get_stored_val
  58349b4... [to-be-committed][RISC-V][PR target/115142] Do not create i
  48ab926... RISC-V: Implement -m{,no}fence-tso
  e043aa6... [to-be-committed,RISC-V] Improve some shift-add sequences
  5b632ee... RISC-V: Fix "Nan-box the result of movbf on soft-bf16"
  a320bcf... RISC-V: Modify _Bfloat16 to __bf16
  0b3502c... RISC-V: Implement IFN SAT_ADD for both the scalar and vecto
  7a46f67... RISC-V: Add initial cost handling for segment loads/stores.
  12ceb8d... internal-fn: Do not force vcond_mask operands to reg.
  9beeeba... RISC-V: Cleanup some temporally files [NFC]
  2d6625b... RISC-V: Enable vectorizable early exit testsuite
  a65f9b1... RISC-V: Implement vectorizable early exit with vcond_mask_l
  f3aa413... Vect: Support loop len in vectorizable early exit
  210fa5e... Vect: Support new IFN SAT_ADD for unsigned vector int
  592205a... Internal-fn: Support new IFN SAT_ADD for unsigned scalar in
  423d10a... RISC-V: testsuite: Drop march-string in cmpmemsi/cpymemsi t
  5b202f0... RISC-V: Add Zvfbfwma extension to the -march= option
  d04ee59... Add missing hunk in recent change.
  3411fe0... [v2,2/2] RISC-V: strcmp expansion: Use adjust_address() for
  1687d67... [v2,1/2] RISC-V: Add cmpmemsi expansion
  d8f7ba2... RISC-V: Test cbo.zero expansion for rv32
  db2ad3d... RISC-V: Allow by-pieces to do overlapping accesses in block
  15af00b... RISC-V: add tests for overlapping mem ops
  242ebff... RISC-V: Allow unaligned accesses in cpymemsi expansion
  3993646... RISC-V: Add test cases for cpymem expansion
  184fca9... [committed] Fix rv32 issues with recent zicboz work
  1db555a... [to-be-committed,RISC-V] Remove redundant AND in shift-add 
  b80fa21... RISC-V: avoid LUI based const materialization ... [part of 
  80bf573... [PATCH 3/3] RISC-V: Add memset-zero expansion to cbo.zero
  547adc9... [PATCH 2/3] RISC-V: testsuite: Make cmo tests LTO safe
  94b1fb8... [1/3] expr: Export clear_by_pieces()
  4bcc64e... RISC-V: Fix format issue for trailing operator [NFC]
  2d30998... [to-be-committed,RISC-V] Improve AND with some constants
  7bee3e5... RISC-V: Bugfix ICE for RVV intrinisc vfw on _Float16 scalar
  ab251bd... [to-be-committed,RISC-V] Improve single inverted bit extrac
  a971125... [to-be-committed,RISC-V] Improve usage of slli.uw in consta
  4853beb... [to-be-committed] RISC-V Fix minor regression in synthesis 
  972cb5c... [RISC-V] Use shNadd for constant synthesis
  73fe7fd... RISC-V: Fix typos in code or comment [NFC]
  a4b72b2... [committed] [RISC-V] Provide splitting guidance to combine 
  227ec9b... RISC-V: Make full-vec-move1.c test robust for optimization
  9491284... RISC-V: Add tests for cpymemsi expansion
  6c5e217... [PATCH v1 1/1] RISC-V: Nan-box the result of movbf on soft-
  b30496a... [RISC-V][V2] Fix incorrect if-then-else nesting of Zbs usag
  d3660f7... RISC-V: Cover sign-extensions in lshr<GPR:mode>3_zero_exten
  76f36d9... RISC-V: Add zero_extract support for rv64gc
  31ab400... RISC-V: Cover sign-extensions in lshrsi3_zero_extend_2
  929ef4d... RISC-V: Add test for sraiw-31 special case
  30096ff... [committed][RISC-V] Turn on overlap_op_by_pieces for generi
  aeadd95... [committed] [RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_
  411f7cc... [RISC-V] [PATCH v2] Enable inlining str* by default
  a38ee93... [PATCH 1/1] RISC-V: Add Zfbfmin extension to the -march= op
  03d11c2... RISC-V: Add testcase for PR114749.
  1c61e73... [RISC-V] Add support for _Bfloat16
  fdaac11... RISC-V: Document -mcmodel=large
  6c0a8df... So another constant synthesis improvement.
  4751ac4... RISC-V: miscll comment fixes [NFC]
  733526b... [committed][RISC-V] Fix nearbyint failure on rv32 and forma
  4313008... [RFA][RISC-V] Improve constant synthesis for constants with
  d3c8cb9... [committed] [RISC-V] Don't run new rounding tests on newlib
  1659526... [committed] [RISC-V] Trivial pattern cleanup
  241fbf9... [committed] [RISC-V] Fix detection of store pair fusion cas
  1f741dd... This is almost exclusively Jivan's work.  His original post
  0285854... RISC-V: Refine the condition for add additional vars in RVV
  fe3b44c... RISC-V: Fix parsing of Zic* extensions
  0761c4e... RISC-V: Add -X to link spec
  2e0f832... Daily bump. (*)
  b0b21d5... Fortran: fix bounds check for assignment, class component [ (*)
  cab8941... Daily bump. (*)
  9031c02... c++: deleting array temporary [PR115187] (*)
  782ad20... c++: Propagate using decls from partitions [PR114868] (*)
  fd6fd88... c++: Fix instantiation of imported temploid friends [PR1142 (*)
  557cddc... c++: Standardise errors for module_may_redeclare (*)
  5429e6a... Daily bump. (*)
  1a6c1c8... sra: Do not leave work for DSE (that it can sometimes not p (*)
  137e7a8... Daily bump. (*)
  c27d6c7... c++: failure to suppress -Wsizeof-array-div in template [PR (*)
  da3a6b0... testsuite: Verify r0-r3 are extended with CMSE (*)
  2f0e086... Fix internal error in seh_cfa_offset with -O2 -fno-omit-fra (*)
  4896bb3... libstdc++: Implement std::formatter<std::thread::id> withou (*)
  fc9fb69... strlen: Fix up !si->full_string_p handling in count_nonzero (*)
  d224c7d... ubsan: Use right address space for MEM_REF created for bool (*)
  1ad5c9d... i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW (*)
  d2f4279... Daily bump. (*)
  5b96d54... c++: Fix std dialect hint for std::to_address [PR107800] (*)
  caf43cc... c++: folding non-dep enumerator from current inst [PR115139 (*)
  edde60a... Fortran: fix dependency checks for inquiry refs [PR115039] (*)
  b2bb49d... match: Disable `(type)zero_one_valuep*CST` for 1bit signed  (*)
  7865971... Daily bump. (*)
  89ab128... PHIOPT: Don't transform minmax if middle bb contains a phi  (*)
  a983793... c++: aggregate CTAD w/ paren init and bases [PR115114] (*)
  b3399b4... c++: lvalueness of non-dependent assignment expr [PR114994] (*)
  2502ac4... Daily bump. (*)
  a7240b0... Daily bump. (*)
  3b88dad... AVR: target/115065 - Tweak __clzhi2. (*)
  c887341... Fortran: Fix select type regression due to r14-9489 [PR1148 (*)
  e909d36... libstdc++: Fix typo in _Grapheme_cluster_view::_Iterator [P (*)
  1e9ae50... tree-optimization/114998 - use-after-free with loop distrib (*)
  81c627d... Update gcc sv.po (*)
  82e4bdc... Daily bump. (*)
  1d89cb4... middle-end/114931 - type_hash_canon and structual equality  (*)
  573e1df... Avoid changing type in the type_hash_canon hash (*)
  7c49e45... Daily bump. (*)
  eefa4c0... libstdc++: Guard dynamic_cast use in src/c++23/print.cc [PR (*)
  c60205c... libstdc++: Fix typo in std::stacktrace::max_size [PR115063] (*)
  4d3b358... libstdc++: Guard uses of is_pointer_interconvertible_v [PR1 (*)
  788ccd2... libstdc++: Update ABI test to disallow adding to released s (*)
  b0f022f... libstdc++: Fix handling of incomplete UTF-8 sequences in _U (*)
  9505519... libstdc++: Fix <memory> for -std=c++23 -ffreestanding [PR11 (*)
  679fa4d... Daily bump. (*)
  57cd866... c++: nested aggregate/alias CTAD fixes [PR114974, PR114901, (*)
  0b5642e... Update gcc .po files (*)
  8fcc4e7... Daily bump. (*)
  80ccc90... doc: Describe limitations re Ada, D, and Go on FreeBSD (*)
  609f969... doc: FreeBSD no longer has a GNU toolchain in base (*)
  7939f88... doc: Remove old details on libunwind for ia64-*-hpux* (*)
  cf43da5... doc: Remove references to FreeBSD 7 and older (*)
  fcdd723... AVR: target/114981 - Tweak __builtin_powif / __powisf2 (*)
  a805de3... c++, mingw: Fix up types of dtor hooks to __cxa_{,thread_}a (*)
  21051de... driver: Move -fdiagnostics-urls= early like -fdiagnostics-c (*)
  a504623... Fortran: fix issues with class(*) assignment [PR114827] (*)
  93793ed... Daily bump. (*)
  726e7a6... testsuite: Fix up vector-subaccess-1.C test for ia32 [PR892 (*)
  bbb76ac... AVR: target/114975 - Add combine-pattern for __parityqi2. (*)
  4ef09dd... AVR: target/114975 - Add combine-pattern for __popcountqi2. (*)
  a9e313e... AVR: target/114981 - Support __builtin_powi[l] / __powidf2. (*)
  7e8fae8... Objective-C, NeXT, v2: Correct a regression in code-gen. (*)
  d54151d... reassoc: Fix up optimize_range_tests_to_bit_test [PR114965] (*)
  cacc480... c++/c-common: Fix convert_vector_to_array_for_subscript for (*)
  61a095b... c++/modules: Stream unmergeable temporaries by value again  (*)
  f43f346... expansion: Use __trunchfbf2 calls rather than __extendhfbf2 (*)
  aca573e... tree-inline: Remove .ASAN_MARK calls when inlining function (*)
  07dab3f... [PR modula2/113768][PR modula2/114133] bugfix constants mus (*)

(*) This commit already exists in another branch.
    Because the reference `refs/vendors/riscv/heads/gcc-14-with-riscv-opts' 
matches
    your hooks.email-new-commits-only configuration,
    no separate email is sent for this commit.

Reply via email to