[gcc r15-339] MIPS: Support constraint 'w' for MSA instruction

[YunQiang Su via Gcc-cvs]

https://gcc.gnu.org/g:9ba01240864ac446052d97692e2199539b7c76d8

commit r15-339-g9ba01240864ac446052d97692e2199539b7c76d8
Author: YunQiang Su <s...@gcc.gnu.org>
Date:   Wed May 8 19:04:33 2024 +0800

    MIPS: Support constraint 'w' for MSA instruction
    
    Support syntax like:
            asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));
    
    gcc
            * config/mips/constraints.md: Add new constraint 'w'.
    
    gcc/testsuite
            * gcc.target/mips/msa-inline-asm.c: New test.

Diff:
---
 gcc/config/mips/constraints.md                 | 3 +++
 gcc/testsuite/gcc.target/mips/msa-inline-asm.c | 9 +++++++++
 2 files changed, 12 insertions(+)

diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index a96028dd7460..f5c881790382 100644
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -29,6 +29,9 @@
 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
   "A floating-point register (if available).")
 
+(define_register_constraint "w" "ISA_HAS_MSA ? FP_REGS : NO_REGS"
+  "A MIPS SIMD register (if available).")
+
 (define_register_constraint "h" "NO_REGS"
   "Formerly the @code{hi} register.  This constraint is no longer supported.")
 
diff --git a/gcc/testsuite/gcc.target/mips/msa-inline-asm.c 
b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
new file mode 100644
index 000000000000..bdf6816ab3b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */
+
+double
+f(double a, double b, double c) {
+  asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));
+  return a;
+}
+/* { dg-final { scan-assembler "fmadd.d \\\$w0, \\\$w\[0-9\]*, \\\$w\[0-9\]*" 
} }  */