The branch 'aoliva/heads/testbase' was updated to point to:
f17d31e709a... Fortran: Detect 'no implicit type' error in right place [PR
It previously pointed to:
694fa3717a9... [vxworks] avoid mangling __STDC_VERSION_LIMITS_H__
Diff:
Summary of changes (added commits):
-----------------------------------
f17d31e... Fortran: Detect 'no implicit type' error in right place [PR (*)
a44d16e... AVR: target/114794 - Tweak __udivmodqi4 (*)
ef23922... Revert "RISC-V: Support highpart register overlap for widen (*)
d37b34f... RISC-V: Add xfail test case for incorrect overlap on v0 (*)
a7d01a7... Daily bump. (*)
3afcb04... Revert "RISC-V: Fix overlap group incorrect overlap on v0" (*)
f9a48fe... PR modula2/112893 full type checking between proctype and p (*)
1690e47... RISC-V: Add xfail test case for wv insn highest overlap (*)
f5447ea... Revert "RISC-V: Support highest overlap for wv instructions (*)
9f10005... RISC-V: Add xfail test case for wv insn register overlap (*)
0cbeafe... Revert "RISC-V: Support one more overlap for wv instruction (*)
90ded75... Daily bump. (*)
c23db3e... i386: Fix up *avx2_eq<mode>3 constraints [PR114783] (*)
2afdecc... c-family: Allow arguments with NULLPTR_TYPE as sentinels [P (*)
a39983b... c: Fix ICE with -g and -std=c23 related to incomplete types (*)
d86472a... libstdc++: Simplify constraints on <=> for std::reference_w (*)
eed7fb1... libstdc++: Support link chains in std::chrono::tzdb::locate (*)
e8f0540... Update gcc sv.po (*)
33bf8e5... internal-fn: Fix up expand_arith_overflow [PR114753] (*)
1216460... middle-end: refactory vect_recog_absolute_difference to sim (*)
9451b6c... Enable 'gcc.dg/pr114768.c' for nvptx target [PR114768] (*)
ede01df... bpf: remove huge memory waste with string allocation. (*)
d7190d0... bpf: support more instructions to match CO-RE relocations (*)
4d4929f... d: Fix ICE in build_deref, at d/d-codegen.cc:1650 [PR111650 (*)
9f29584... rtlanal: Fix set_noop_p for volatile loads or stores [PR114 (*)
36f4c8a... libgcc: Another __divmodbitint4 bug fix [PR114762] (*)
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