https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128221
Hongtao Liu <liuhongt at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Assignee|unassigned at gcc dot gnu.org |haochen.jiang at intel
dot com
CC| |liuhongt at gcc dot gnu.org
--- Comment #1 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
the backend generates separate non-conditional fma + condition move for
cond_fma and relies on combine to generate masked fma, it needs to be fixed.
6404(define_expand "cond_fma<mode>"
6405 [(set (match_operand:VFH_AVX512VL 0 "register_operand")
6406 (vec_merge:VFH_AVX512VL
6407 (fma:VFH_AVX512VL
6408 (match_operand:VFH_AVX512VL 2 "vector_operand")
6409 (match_operand:VFH_AVX512VL 3 "vector_operand")
6410 (match_operand:VFH_AVX512VL 4 "vector_operand"))
6411 (match_operand:VFH_AVX512VL 5 "nonimm_or_0_operand")
6412 (match_operand:<avx512fmaskmode> 1 "register_operand")))]
6413 "TARGET_AVX512F"
6414{
6415 rtx tmp = gen_reg_rtx (<MODE>mode);
6416 emit_insn (gen_fma<mode>4 (tmp,
6417 operands[2],
6418 operands[3],
6419 operands[4]));
6420 emit_move_insn (operands[0], gen_rtx_VEC_MERGE (<MODE>mode,
6421 tmp,
6422 operands[5],
6423 operands[1]));
6424 DONE;
6425})
