https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127452
vekumar at gcc dot gnu.org changed:
What |Removed |Added
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CC| |vekumar at gcc dot gnu.org
--- Comment #10 from vekumar at gcc dot gnu.org ---
(In reply to Richard Biener from comment #4)
> The promised late rewrite to scalar MULT_HIGHPART_EXPR happens, but we seem
> to prefer generating imul over mulx. even though x86 has imul over mulx even
> with explicit -mbmi2 - that might be a target thing though, we do not seem
> to have direct scalar 64bit mulh expanders?
The below change generates mulx for -mbmi2. shall I send this patch??
--snip--
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d5b90291fc9..7ee5eb35538 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -11938,7 +11938,7 @@
;; When both output operands are identical, MULX writes the high half to that
;; register, so no scratch register is needed. This avoids the mov from rdx
;; after mulq when only the high part is needed.
-(define_insn "*bmi2_umul<mode>3_highpart"
+(define_insn "bmi2_umul<mode>3_highpart"
[(set (match_operand:DWIH 0 "register_operand" "=r")
(umul_highpart:DWIH
(match_operand:DWIH 1 "register_operand" "d")
@@ -11950,7 +11950,24 @@
(set_attr "mode" "<MODE>")])
;; Highpart multiplication patterns
-(define_insn "<s>mul<mode>3_highpart"
+(define_expand "<s>mul<mode>3_highpart"
+ [(parallel [(set (match_operand:DWIH 0 "register_operand")
+ (any_mul_highpart:DWIH
+ (match_operand:DWIH 1 "register_operand")
+ (match_operand:DWIH 2 "nonimmediate_operand")))
+ (clobber (scratch:DWIH))
+ (clobber (reg:CC FLAGS_REG))])]
+ ""
+{
+ if (<CODE> == UMUL_HIGHPART && TARGET_BMI2)
+ {
+ emit_insn (gen_bmi2_umul<mode>3_highpart (operands[0], operands[1],
+ operands[2]));
+ DONE;
+ }
+})
+
+(define_insn "*<s>mul<mode>3_highpart"
[(set (match_operand:DWIH 0 "register_operand" "=d")
(any_mul_highpart:DWIH
(match_operand:DWIH 1 "register_operand" "%a")
--snip--
