https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127100
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> --- The emitted instructions used to be vll %v2,%r1,164(%r15) I can't find documentation for it, but the %r1 in there is the value of the 4th .LEN_LOAD operand and clearly the instruction loads %r1+1 bytes from %r15+164 address into the vector register and zero initializes the remaining elements. So if %r15+164 contains 0xaaaaaaaaaaaaaaaa, 0xaaaaaaaaaaaaaaaa values and %r1 is 1 and %v2 before the operation 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55 %v2 has afterwards 0xaa, 0xaa, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0. Because doc/md.texi describes the operation to be load of len+bias lanes (bytes for V?QImode modes), I think bias -1 looks wrong for s390x, shouldn't that be 1 instead?
