https://gcc.gnu.org/bugzilla/show_bug.cgi?id=126065
--- Comment #2 from postmaster at raasu dot org --- While I was checking how different GCC versions handle the optimizing, I noticed only GCC 16.1 even tried to optimize the code. Since first minor release of GCC 7 and up until last minor release of GCC 15, the code was duplicated and the "scalar version" used 0xFFFF constant, move to K-register and right shift within K-register. So I guess the real work to fix the optimizing of K-register related instruction sequences was started quite recently. Only when the mask can be reduced to constant and the mask is not immediately used for AVX512 instruction other than move to scalar, it should be valid to optimize to fully scalar version. This does match what Clang does currently. Otherwise, when XOR or XNOR and possibly single left or right shift isn't enough to calculate the mask, calculating the mask can be done in GPR and moved from GPR to K-register, as K-registers don't allow complex arithmetics or shifting by amount stored in another K-register or GPR. When possible, calculating the mask directly in K-register avoids unnecessary pressure on GPR registers when a lot of them are required by surrounding code. Although it frees only one GPR register for other use, sometimes it can be enough to avoid unnecessary register spill as both XOR and XNOR only require that both source registers are same, actual contents are irrelevant. Using constant "0" in C source for source K-register is just to avoid warning about initializing variable with itself.
