------- Additional Comments From schlie at comcast dot net 2004-11-23 13:49
-------
Subject: Re: missed volatile variable optimizations
Reviewing the rtl dump of the code, it does appear that SI mode volatile
and nonvolatile variables are being initialized similarly (through an
intermediate), but DI mode variables aren't (which may be a libgcc2
anomaly); where SI mode variables are first being assigned to an
intermediate temporary, then being set to that intermediate value, as
opposed to being set directly using a const_int source value in the
initialization expression: i.e.
(insn 12 11 13 (set (mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(const_int 5 [0x5])) -1 (nil)
(nil))
vs.
(insn 11 10 12 (set (reg:SI 43)
(const_int 5 [0x5])) -1 (nil)
(nil))
(insn 12 11 13 (set (mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(reg:SI 43)) -1 (nil)
(nil))
where the former would seem more ideal (if the value wasn't subsequently
required, which it isn't, and not rely on back-end optimization)?
But DI mode non-volatile variables are split between being initialized by
being decomposed to QI mode assignments, partially through the use of an
intermediate, and a known zero register value, which actually complicates
things a bit as the rtl representation has hidden the notion of a DI mode
variable, inhibiting potential subsequent optimizations; while volatile DI
mode variables are being initialized through the use of an intermediate as
SI mode variable initialization is.
If nothing else, this non-uniformity of initialization behavior would seem
to complicate the then necessary back-end target specific optimization then
required to optimize it's implementation mapping?
(I suspect that this non-uniformity may have to do with how DI mode
variables operations are defined in libgcc2 by default vs SI mode variable
operations?)
-----
;; Function main
(note 1 0 2 ("main.c") 1)
(note 2 1 3 NOTE_INSN_DELETED)
(note 3 2 4 NOTE_INSN_FUNCTION_BEG)
(note 4 3 5 NOTE_INSN_DELETED)
(note 5 4 6 0x40884190 NOTE_INSN_BLOCK_BEG)
(note 6 5 7 NOTE_INSN_DELETED)
(note 7 6 8 ("main.c") 3)
(insn 8 7 9 (set (reg:SI 42)
(const_int 3 [0x3])) -1 (nil)
(nil))
(insn 9 8 10 (set (mem/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 4 [0x4])) [0 ly+0 S4 A32])
(reg:SI 42)) -1 (nil)
(nil))
(note 10 9 11 ("main.c") 4)
(insn 11 10 12 (set (reg:SI 43)
(const_int 5 [0x5])) -1 (nil)
(nil))
(insn 12 11 13 (set (mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(reg:SI 43)) -1 (nil)
(nil))
(note 13 12 14 ("main.c") 6)
(insn 14 13 15 (set (reg:QI 44)
(const_int 6 [0x6])) -1 (nil)
(nil))
(insn 15 14 16 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 20 [0x14])) [0 lly+0 S1 A64])
(reg:QI 44)) -1 (nil)
(nil))
(insn 16 15 17 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 21 [0x15])) [0 lly+1 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 17 16 18 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 22 [0x16])) [0 lly+2 S1 A16])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 18 17 19 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 23 [0x17])) [0 lly+3 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 19 18 20 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 24 [0x18])) [0 lly+4 S1 A32])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 20 19 21 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 25 [0x19])) [0 lly+5 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 21 20 22 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 26 [0x1a])) [0 lly+6 S1 A16])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 22 21 23 (set (mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 27 [0x1b])) [0 lly+7 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(note 23 22 24 ("main.c") 7)
(insn 24 23 25 (set (reg:QI 45)
(const_int 7 [0x7])) -1 (nil)
(nil))
(insn 25 24 26 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 28 [0x1c])) [0 llv+0 S1 A64])
(reg:QI 45)) -1 (nil)
(nil))
(insn 26 25 27 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 29 [0x1d])) [0 llv+1 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 27 26 28 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 30 [0x1e])) [0 llv+2 S1 A16])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 28 27 29 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 31 [0x1f])) [0 llv+3 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 29 28 30 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 32 [0x20])) [0 llv+4 S1 A32])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 30 29 31 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 33 [0x21])) [0 llv+5 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 31 30 32 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 34 [0x22])) [0 llv+6 S1 A16])
(const_int 0 [0x0])) -1 (nil)
(nil))
(insn 32 31 33 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 35 [0x23])) [0 llv+7 S1 A8])
(const_int 0 [0x0])) -1 (nil)
(nil))
(note 33 32 34 ("main.c") 9)
(insn 34 33 35 (set (reg:SI 18 r18)
(mem/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 4 [0x4])) [0 ly+0 S4 A32])) -1 (nil)
(insn_list:REG_LIBCALL 37 (nil)))
(insn 35 34 36 (set (reg:SI 22 r22)
(mem/f:SI (reg/f:HI 37 virtual-stack-vars) [0 lx+0 S4 A32])) -1
(nil)
(nil))
(call_insn/u 36 35 37 (set (reg:SI 22 r22)
(call (mem:HI (symbol_ref:HI ("__mulsi3") [flags 0x41]) [0 S2 A8])
(const_int 0 [0x0]))) -1 (nil)
(expr_list:REG_EH_REGION (const_int -1 [0xffffffff])
(nil))
(expr_list (use (reg:SI 18 r18))
(expr_list (use (reg:SI 22 r22))
(nil))))
(insn 37 36 38 (set (reg:SI 46)
(reg:SI 22 r22)) -1 (nil)
(insn_list:REG_RETVAL 34 (expr_list:REG_EQUAL (mult:SI (mem/f:SI
(reg/f:HI 37 virtual-stack-vars) [0 lx+0 S4 A32])
(mem/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 4 [0x4])) [0 ly+0 S4 A32]))
(nil))))
(insn 38 37 39 (set (mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(reg:SI 46)) -1 (nil)
(nil))
(note 39 38 40 ("main.c") 10)
(insn 40 39 41 (set (reg:SI 18 r18)
(mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])) -1 (nil)
(insn_list:REG_LIBCALL 43 (nil)))
(insn 41 40 42 (set (reg:SI 22 r22)
(mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])) -1 (nil)
(nil))
(call_insn/u 42 41 43 (set (reg:SI 22 r22)
(call (mem:HI (symbol_ref:HI ("__mulsi3") [flags 0x41]) [0 S2 A8])
(const_int 0 [0x0]))) -1 (nil)
(expr_list:REG_EH_REGION (const_int -1 [0xffffffff])
(nil))
(expr_list (use (reg:SI 18 r18))
(expr_list (use (reg:SI 22 r22))
(nil))))
(insn 43 42 44 (set (reg:SI 47)
(reg:SI 22 r22)) -1 (nil)
(insn_list:REG_RETVAL 40 (expr_list:REG_EQUAL (mult:SI (mem/v/f:SI
(plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32]))
(nil))))
(insn 44 43 45 (set (mem/v/f:SI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 8 [0x8])) [0 lv+0 S4 A32])
(reg:SI 47)) -1 (nil)
(nil))
(note 45 44 46 ("main.c") 12)
(insn 46 45 47 (set (reg:QI 10 r10)
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 20 [0x14])) [0 lly+0 S1 A64])) -1 (nil)
(insn_list:REG_LIBCALL 70 (nil)))
(insn 47 46 48 (set (reg:QI 11 r11 [+1 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 21 [0x15])) [0 lly+1 S1 A8])) -1 (nil)
(nil))
(insn 48 47 49 (set (reg:QI 12 r12 [+2 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 22 [0x16])) [0 lly+2 S1 A16])) -1 (nil)
(nil))
(insn 49 48 50 (set (reg:QI 13 r13 [+3 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 23 [0x17])) [0 lly+3 S1 A8])) -1 (nil)
(nil))
(insn 50 49 51 (set (reg:QI 14 r14 [+4 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 24 [0x18])) [0 lly+4 S1 A32])) -1 (nil)
(nil))
(insn 51 50 52 (set (reg:QI 15 r15 [+5 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 25 [0x19])) [0 lly+5 S1 A8])) -1 (nil)
(nil))
(insn 52 51 53 (set (reg:QI 16 r16 [+6 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 26 [0x1a])) [0 lly+6 S1 A16])) -1 (nil)
(nil))
(insn 53 52 54 (set (reg:QI 17 r17 [+7 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 27 [0x1b])) [0 lly+7 S1 A8])) -1 (nil)
(nil))
(insn 54 53 55 (set (reg:QI 18 r18)
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 12 [0xc])) [0 llx+0 S1 A64])) -1 (nil)
(nil))
(insn 55 54 56 (set (reg:QI 19 r19 [+1 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 13 [0xd])) [0 llx+1 S1 A8])) -1 (nil)
(nil))
(insn 56 55 57 (set (reg:QI 20 r20 [+2 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 14 [0xe])) [0 llx+2 S1 A16])) -1 (nil)
(nil))
(insn 57 56 58 (set (reg:QI 21 r21 [+3 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 15 [0xf])) [0 llx+3 S1 A8])) -1 (nil)
(nil))
(insn 58 57 59 (set (reg:QI 22 r22 [+4 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 16 [0x10])) [0 llx+4 S1 A32])) -1 (nil)
(nil))
(insn 59 58 60 (set (reg:QI 23 r23 [+5 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 17 [0x11])) [0 llx+5 S1 A8])) -1 (nil)
(nil))
(insn 60 59 61 (set (reg:QI 24 r24 [+6 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 18 [0x12])) [0 llx+6 S1 A16])) -1 (nil)
(nil))
(insn 61 60 62 (set (reg:QI 25 r25 [+7 ])
(mem/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 19 [0x13])) [0 llx+7 S1 A8])) -1 (nil)
(nil))
(call_insn/u 62 61 71 (set (reg:DI 18 r18)
(call (mem:HI (symbol_ref:HI ("__muldi3") [flags 0x41]) [0 S2 A8])
(const_int 0 [0x0]))) -1 (nil)
(expr_list:REG_EH_REGION (const_int -1 [0xffffffff])
(nil))
(expr_list (use (reg:DI 10 r10))
(expr_list (use (reg:DI 18 r18))
(nil))))
(insn 71 62 63 (clobber (reg:DI 48)) -1 (nil)
(nil))
(insn 63 71 64 (set (subreg:QI (reg:DI 48) 0)
(reg:QI 18 r18)) -1 (nil)
(nil))
(insn 64 63 65 (set (subreg:QI (reg:DI 48) 1)
(reg:QI 19 r19 [+1 ])) -1 (nil)
(nil))
(insn 65 64 66 (set (subreg:QI (reg:DI 48) 2)
(reg:QI 20 r20 [+2 ])) -1 (nil)
(nil))
(insn 66 65 67 (set (subreg:QI (reg:DI 48) 3)
(reg:QI 21 r21 [+3 ])) -1 (nil)
(nil))
(insn 67 66 68 (set (subreg:QI (reg:DI 48) 4)
(reg:QI 22 r22 [+4 ])) -1 (nil)
(nil))
(insn 68 67 69 (set (subreg:QI (reg:DI 48) 5)
(reg:QI 23 r23 [+5 ])) -1 (nil)
(nil))
(insn 69 68 70 (set (subreg:QI (reg:DI 48) 6)
(reg:QI 24 r24 [+6 ])) -1 (nil)
(nil))
(insn 70 69 72 (set (subreg:QI (reg:DI 48) 7)
(reg:QI 25 r25 [+7 ])) -1 (nil)
(insn_list:REG_RETVAL 46 (nil)))
(insn 72 70 73 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 28 [0x1c])) [0 llv+0 S1 A64])
(subreg:QI (reg:DI 48) 0)) -1 (nil)
(nil))
(insn 73 72 74 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 29 [0x1d])) [0 llv+1 S1 A8])
(subreg:QI (reg:DI 48) 1)) -1 (nil)
(nil))
(insn 74 73 75 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 30 [0x1e])) [0 llv+2 S1 A16])
(subreg:QI (reg:DI 48) 2)) -1 (nil)
(nil))
(insn 75 74 76 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 31 [0x1f])) [0 llv+3 S1 A8])
(subreg:QI (reg:DI 48) 3)) -1 (nil)
(nil))
(insn 76 75 77 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 32 [0x20])) [0 llv+4 S1 A32])
(subreg:QI (reg:DI 48) 4)) -1 (nil)
(nil))
(insn 77 76 78 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 33 [0x21])) [0 llv+5 S1 A8])
(subreg:QI (reg:DI 48) 5)) -1 (nil)
(nil))
(insn 78 77 79 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 34 [0x22])) [0 llv+6 S1 A16])
(subreg:QI (reg:DI 48) 6)) -1 (nil)
(nil))
(insn 79 78 80 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 35 [0x23])) [0 llv+7 S1 A8])
(subreg:QI (reg:DI 48) 7)) -1 (nil)
(nil))
(note 80 79 81 ("main.c") 13)
(insn 81 80 82 (set (reg:QI 10 r10)
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 28 [0x1c])) [0 llv+0 S1 A64])) -1 (nil)
(insn_list:REG_LIBCALL 105 (nil)))
(insn 82 81 83 (set (reg:QI 11 r11 [+1 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 29 [0x1d])) [0 llv+1 S1 A8])) -1 (nil)
(nil))
(insn 83 82 84 (set (reg:QI 12 r12 [+2 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 30 [0x1e])) [0 llv+2 S1 A16])) -1 (nil)
(nil))
(insn 84 83 85 (set (reg:QI 13 r13 [+3 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 31 [0x1f])) [0 llv+3 S1 A8])) -1 (nil)
(nil))
(insn 85 84 86 (set (reg:QI 14 r14 [+4 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 32 [0x20])) [0 llv+4 S1 A32])) -1 (nil)
(nil))
(insn 86 85 87 (set (reg:QI 15 r15 [+5 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 33 [0x21])) [0 llv+5 S1 A8])) -1 (nil)
(nil))
(insn 87 86 88 (set (reg:QI 16 r16 [+6 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 34 [0x22])) [0 llv+6 S1 A16])) -1 (nil)
(nil))
(insn 88 87 89 (set (reg:QI 17 r17 [+7 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 35 [0x23])) [0 llv+7 S1 A8])) -1 (nil)
(nil))
(insn 89 88 90 (set (reg:QI 18 r18)
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 28 [0x1c])) [0 llv+0 S1 A64])) -1 (nil)
(nil))
(insn 90 89 91 (set (reg:QI 19 r19 [+1 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 29 [0x1d])) [0 llv+1 S1 A8])) -1 (nil)
(nil))
(insn 91 90 92 (set (reg:QI 20 r20 [+2 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 30 [0x1e])) [0 llv+2 S1 A16])) -1 (nil)
(nil))
(insn 92 91 93 (set (reg:QI 21 r21 [+3 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 31 [0x1f])) [0 llv+3 S1 A8])) -1 (nil)
(nil))
(insn 93 92 94 (set (reg:QI 22 r22 [+4 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 32 [0x20])) [0 llv+4 S1 A32])) -1 (nil)
(nil))
(insn 94 93 95 (set (reg:QI 23 r23 [+5 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 33 [0x21])) [0 llv+5 S1 A8])) -1 (nil)
(nil))
(insn 95 94 96 (set (reg:QI 24 r24 [+6 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 34 [0x22])) [0 llv+6 S1 A16])) -1 (nil)
(nil))
(insn 96 95 97 (set (reg:QI 25 r25 [+7 ])
(mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 35 [0x23])) [0 llv+7 S1 A8])) -1 (nil)
(nil))
(call_insn/u 97 96 106 (set (reg:DI 18 r18)
(call (mem:HI (symbol_ref:HI ("__muldi3") [flags 0x41]) [0 S2 A8])
(const_int 0 [0x0]))) -1 (nil)
(expr_list:REG_EH_REGION (const_int -1 [0xffffffff])
(nil))
(expr_list (use (reg:DI 10 r10))
(expr_list (use (reg:DI 18 r18))
(nil))))
(insn 106 97 98 (clobber (reg:DI 49)) -1 (nil)
(nil))
(insn 98 106 99 (set (subreg:QI (reg:DI 49) 0)
(reg:QI 18 r18)) -1 (nil)
(nil))
(insn 99 98 100 (set (subreg:QI (reg:DI 49) 1)
(reg:QI 19 r19 [+1 ])) -1 (nil)
(nil))
(insn 100 99 101 (set (subreg:QI (reg:DI 49) 2)
(reg:QI 20 r20 [+2 ])) -1 (nil)
(nil))
(insn 101 100 102 (set (subreg:QI (reg:DI 49) 3)
(reg:QI 21 r21 [+3 ])) -1 (nil)
(nil))
(insn 102 101 103 (set (subreg:QI (reg:DI 49) 4)
(reg:QI 22 r22 [+4 ])) -1 (nil)
(nil))
(insn 103 102 104 (set (subreg:QI (reg:DI 49) 5)
(reg:QI 23 r23 [+5 ])) -1 (nil)
(nil))
(insn 104 103 105 (set (subreg:QI (reg:DI 49) 6)
(reg:QI 24 r24 [+6 ])) -1 (nil)
(nil))
(insn 105 104 107 (set (subreg:QI (reg:DI 49) 7)
(reg:QI 25 r25 [+7 ])) -1 (nil)
(insn_list:REG_RETVAL 81 (nil)))
(insn 107 105 108 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 28 [0x1c])) [0 llv+0 S1 A64])
(subreg:QI (reg:DI 49) 0)) -1 (nil)
(nil))
(insn 108 107 109 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 29 [0x1d])) [0 llv+1 S1 A8])
(subreg:QI (reg:DI 49) 1)) -1 (nil)
(nil))
(insn 109 108 110 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 30 [0x1e])) [0 llv+2 S1 A16])
(subreg:QI (reg:DI 49) 2)) -1 (nil)
(nil))
(insn 110 109 111 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 31 [0x1f])) [0 llv+3 S1 A8])
(subreg:QI (reg:DI 49) 3)) -1 (nil)
(nil))
(insn 111 110 112 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 32 [0x20])) [0 llv+4 S1 A32])
(subreg:QI (reg:DI 49) 4)) -1 (nil)
(nil))
(insn 112 111 113 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 33 [0x21])) [0 llv+5 S1 A8])
(subreg:QI (reg:DI 49) 5)) -1 (nil)
(nil))
(insn 113 112 114 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 34 [0x22])) [0 llv+6 S1 A16])
(subreg:QI (reg:DI 49) 6)) -1 (nil)
(nil))
(insn 114 113 115 (set (mem/v/f:QI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 35 [0x23])) [0 llv+7 S1 A8])
(subreg:QI (reg:DI 49) 7)) -1 (nil)
(nil))
(note 115 114 116 ("main.c") 15)
(note 116 115 117 NOTE_INSN_DELETED)
(note 117 116 118 NOTE_INSN_DELETED)
(insn 118 117 119 (set (reg:HI 50)
(mem/f:HI (reg/f:HI 37 virtual-stack-vars) [0 lx+0 S2 A32])) -1
(nil)
(nil))
(insn 119 118 120 (set (reg:HI 51)
(mem/f:HI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 4 [0x4])) [0 ly+0 S2 A32])) -1 (nil)
(nil))
(insn 120 119 121 (set (reg:HI 50)
(plus:HI (reg:HI 50)
(reg:HI 51))) -1 (nil)
(nil))
(insn 121 120 122 (set (reg:HI 52)
(mem/f:HI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 12 [0xc])) [0 llx+0 S2 A64])) -1 (nil)
(nil))
(insn 122 121 123 (set (reg:HI 50)
(plus:HI (reg:HI 50)
(reg:HI 52))) -1 (nil)
(nil))
(insn 123 122 124 (set (reg:HI 53)
(mem/f:HI (plus:HI (reg/f:HI 37 virtual-stack-vars)
(const_int 20 [0x14])) [0 lly+0 S2 A64])) -1 (nil)
(nil))
(insn 124 123 125 (set (reg:HI 50)
(plus:HI (reg:HI 50)
(reg:HI 53))) -1 (nil)
(nil))
(insn 125 124 126 (set (reg:HI 41 [ <result> ])
(reg:HI 50)) -1 (nil)
(nil))
(jump_insn 126 125 127 (set (pc)
(label_ref 131)) -1 (nil)
(nil))
(barrier 127 126 128)
(note 128 127 129 0x40884190 NOTE_INSN_BLOCK_END)
(note 129 128 130 NOTE_INSN_FUNCTION_END)
(note 130 129 133 ("main.c") 16)
(insn 133 130 134 (clobber (reg/i:HI 24 r24)) -1 (nil)
(nil))
(insn 134 133 131 (clobber (reg:HI 41 [ <result> ])) -1 (nil)
(nil))
(code_label 131 134 132 1 "" [0 uses])
(insn 132 131 135 (set (reg/i:HI 24 r24)
(reg:HI 41 [ <result> ])) -1 (nil)
(nil))
(insn 135 132 0 (use (reg/i:HI 24 r24)) -1 (nil)
(nil))
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18617
