https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124559
Bug ID: 124559
Summary: Improve constant synthesis for RISC-V
Product: gcc
Version: 16.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
This missed-optimization is pretty trivial and likely not all that important in
the grand scheme of things, but popped as we were building out the
infrastructure for this testing.
If we look at the sub2 test in load-immediate.c in the RISC-V testsuite we'll
see that GCC generates:
li a5,-32768
sh a5,0(a0)
xori a5,a5,-1
sh a5,0(a1)
LLVM generates:
lui a2, 8
sh a2, 0(a0)
addi a2, a2, -1
sh a2, 0(a1)
Not surprisingly the difference is the constant synthesis. LLVM's approach
encodes smaller because the addi can be compressed into a 16bit instruction
while GCC's xori remaings a 32bit instruction. The key difference is c.addi
allows any of the 32 registers while xori only compresses if you use a limited
subset of registers.
This is ultimately a quirk in how GCC handles HImode constants that appears to
be easily fixable and results in simpler code within GCC itself.
