https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123016

avieira at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |avieira at gcc dot gnu.org

--- Comment #5 from avieira at gcc dot gnu.org ---

So I haven't tested this properly but:
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -4482,6 +4482,10 @@ vectorizable_simd_clone_call (vec_info *vinfo,
stmt_vec_info stmt_info,
                  else
                    {
                      masktype =
bestn_inbranch->simdclone->args[i].vector_type;
+                     masktype
+                       = get_related_vectype_for_scalar_type (TYPE_MODE
(masktype),
+                                                              TREE_TYPE
(masktype),
+                                                             
TYPE_VECTOR_SUBPARTS (masktype));
                      callee_nelements = TYPE_VECTOR_SUBPARTS (masktype);
                    }
                  auto o = vector_unroll_factor (nunits, callee_nelements);

avoids the ICE and it leads to vectorization of the example richi posted, with
a minor change to trigger the ICE to begin with:
- !GCC$ builtin (exp) attributes simd (notinbranch)
+ !GCC$ builtin (expf) attributes simd (notinbranch)

However, the vectorized loop disappears in RTL, not sure why, the gimple looks
OK at first glance, but I'm about to jump into meetings now. The loop body in
optimized:

  <bb 5> [local count: 764504183]:                                              
  # vect_vec_iv_.15_60 = PHI <_62(5), _58(4)>                                   
  # ivtmp_83 = PHI <ivtmp_84(5), 0(4)>                                          
  # loop_mask_68 = PHI <next_mask_87(5), max_mask_86(4)>                        
  vect_th_23.16_63 = _51 + vect_vec_iv_.15_60;                                  
  vect__3.18_66 = { 0.0, ... } / vect_th_23.16_63;                              
  mask__10.17_65 = vect_th_23.16_63 > _64;                                      
  _67 = VIEW_CONVERT_EXPR<vector([4,4]) real(kind=4)>(vect__3.18_66);           
  vec_mask_and_69 = mask__10.17_65 & loop_mask_68;                              
  _2 = VIEW_CONVERT_EXPR<vector([4,4]) <signed-boolean:4>>(vec_mask_and_69);    
  _70 = _2 & { 1(OVF), ... };                                                   
  _71 = expf.simdclone.2 (_67, _70);                                            
  vect_qs_25.19_72 = VIEW_CONVERT_EXPR<vector([4,4]) real(kind=4)>(_71);        
  vect_qs_8.20_73 = .VCOND_MASK (mask__10.17_65, vect_qs_25.19_72, { 0.0, ...
});                                                                             
  vect__4.21_75 = vect_qs_8.20_73 * _74;                                        
  _76 = VIEW_CONVERT_EXPR<vector([4,4]) real(kind=4)>(vect__4.21_75);           
  _77 = .VCOND_MASK (loop_mask_68, { 1, ... }, { 0, ... });                     
  _78 = expf.simdclone.2 (_76, _77);                                            
  vect__6.22_79 = VIEW_CONVERT_EXPR<vector([4,4]) real(kind=4)>(_78);           
  _37 = &MEM <vector([4,4]) real(kind=4)> [(real(kind=4) *)A.6_19 + ivtmp_83 *
4];                                                                             
  .MASK_STORE (_37, 32B, loop_mask_68, vect__6.22_79);                          
  _62 = vect_vec_iv_.15_60 + _61;                                               
  ivtmp_84 = ivtmp_83 + POLY_INT_CST [4, 4];                                    
  _55 = (unsigned int) ivtmp_84;                                                
  next_mask_87 = .WHILE_ULT (_55, bnd.14_50, { 0, ... });                       
  if (next_mask_87 == { 0, ... })                                               
    goto <bb 11>; [11.00%]                                                      
  else                                                                          
    goto <bb 5>; [89.00%]

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