https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123317
--- Comment #5 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jeff Law <[email protected]>: https://gcc.gnu.org/g:2dbf9c0feca31597e691e0401f4723380db4612e commit r16-6502-g2dbf9c0feca31597e691e0401f4723380db4612e Author: Pan Li <[email protected]> Date: Mon Jan 5 09:26:47 2026 -0700 [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317] From: Pan Li <[email protected]> The vwaddu/vwsubu wx combine patterns take the any_extend by mistake, it is unsigned so we must leverage zero_extend here. This PATCH would like to fix this which result in sign_extend code pattern combine to vwaddu/vwsub.wx. PR target/123317 gcc/ChangeLog: * config/riscv/autovec-opt.md: Take zero_extend for both the vwaddu and vwsubu wx pattern. Signed-off-by: Pan Li <[email protected]>
