https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123010
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> --- addw has an implicit sign extend to 64bit mode.
[Bug target/123010] RISC-V: 32-bit multiply by 2 generates slli+srai+slli and doesn't use slliw or addw
pinskia at gcc dot gnu.org via Gcc-bugs Thu, 04 Dec 2025 10:59:46 -0800
- [Bug target/123010] New: RISC... camel-cdr at protonmail dot com via Gcc-bugs
- [Bug target/123010] RISC... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] RISC... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] RISC... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] RV64... camel-cdr at protonmail dot com via Gcc-bugs
- [Bug target/123010] RV64... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] RV64... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] RV64... pinskia at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] [15/... rguenth at gcc dot gnu.org via Gcc-bugs
- [Bug target/123010] [15/... law at gcc dot gnu.org via Gcc-bugs
