https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122215
Vladimir Makarov <vmakarov at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |vmakarov at gcc dot gnu.org
--- Comment #13 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
I've looked at improve_allocation code and here is my speculation on the bug
reasons.
It seems that costs can be undefined for some hard regs.
Earlier in improve_allocation we have:
for (j = 0; j < class_size; j++)
{
hregno = ira_class_hard_regs[aclass][j];
if (! check_hard_reg_p (a, hregno,
conflicting_regs, profitable_hard_regs))
continue;
if (NUM_REGISTER_FILTERS
&& !test_register_filters (ALLOCNO_REGISTER_FILTERS (a), hregno))
continue;
ira_assert (ira_class_hard_reg_index[aclass][hregno] == j);
k = allocno_costs == NULL ? 0 : j;
costs[hregno] = (allocno_costs == NULL
Later we have
for (j = 0; j < class_size; j++)
{
hregno = ira_class_hard_regs[aclass][j];
if (check_hard_reg_p (a, hregno,
conflicting_regs, profitable_hard_regs)
&& min_cost > costs[hregno])
There is no condition for register filters introduced by 2023 Richard
Sandiford's patch. And riscv uses filters, e.g.
(define_register_constraint "cR" "RVC_GR_REGS"
"Even-odd RVC general purpose register (x8-x15)."
"regno % 2 == 0")
As costs is a small array on stack, we have such unstable results.
Jeff, if you are not working on the fix yet, I can try to fix it, probably on
this week. Just let me know, please.
