[Bug target/122971] [15/6 Regression] [RISCV] [Miscompile] GCC - riscv64 target, miscompiles at -O3 since r15-6278-gec870d3b5f3781

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122971

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2025-12-03