https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49391
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |pinskia at gcc dot gnu.org
Last reconfirmed|2024-03-27 00:00:00 |2025-11-14
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
This is the pattern:
```
(define_insn_and_split "*arm_andsi3_insn"
[(set (match_operand:SI 0 "s_register_operand" "=r,l,r,r,r,r")
(and:SI (match_operand:SI 1 "s_register_operand" "%r,0,r,r,0,r")
(match_operand:SI 2 "reg_or_int_operand" "I,l,K,r,Dj,?n")))]
"TARGET_32BIT"
"@
and%?\\t%0, %1, %2
and%?\\t%0, %1, %2
bic%?\\t%0, %1, #%B2
and%?\\t%0, %1, %2
bfc%?\\t%0, %V2
#"
"TARGET_32BIT
&& CONST_INT_P (operands[2])
&& !(const_ok_for_arm (INTVAL (operands[2]))
|| const_ok_for_arm (~INTVAL (operands[2]))
|| (arm_arch_thumb2
&& satisfies_constraint_Dj (operands[2])
&& (rtx_equal_p (operands[0], operands[1])
|| !reload_completed)))"
[(clobber (const_int 0))]
"
arm_split_constant (AND, SImode, curr_insn,
INTVAL (operands[2]), operands[0], operands[1], 0);
DONE;
"
[(set_attr "length" "4,4,4,4,4,16")
(set_attr "predicable" "yes")
(set_attr "predicable_short_it" "no,yes,no,no,no,no")
(set_attr "arch" "*,*,*,*,v6t2,*")
(set_attr "type" "logic_imm,logic_imm,logic_reg,logic_reg,bfm,logic_imm")]
)
```
So if I understand only correctly k can be added next to r in operand 1 the 3rd
variant. As it is also valid for thumb2 too ...
