https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121993
--- Comment #7 from cuilili <lili.cui at intel dot com> --- Thank you for your feedback, your understanding is correct. Cache alignment is difficult to control and has a certain degree of randomness, so we generally do not make any changes. This performance regression typically improves with gcc changes, but it can be somewhat random. This bug can usually be closed, but you may choose to keep it for a while.
