https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101639
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
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Attachment #62554|0 |1
is obsolete| |
--- Comment #29 from Richard Biener <rguenth at gcc dot gnu.org> ---
Created attachment 62566
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=62566&action=edit
updated patch series
This is my current series, it has the dummy x86 pattern removed, the pattern
names changed to reduc_sbool_{and,ior,xor}_scal and for integer mode variants
the expander receives an additional CONST_INT indicating the number of lanes
in the mask. Note the vectorizer patch currently doesn't validate the
operand predicate, so it's expected the backend implements them all (I'll
probably change this).
The gcc.dg/vect/vect-reduc-bool-*.c tests are a bit expanded to cover both
AND and IOR, not yet XOR (want to split that because likely XOR support
might vary). I've added long long to type coverage, with appropriate
-mprefer-vector-width you can trigger the missed 2-bit and 4-bit precision
handling as execute FAILs there (-4 also fails with 512bit).
I do not see the ICE you report with -march=sapphirerapids, not sure why
(there should be no need for any permute mask).
