[Bug target/121910] RISC-V: dynamic lmul choosing wrong vector mode

[chenzhongyao.hit at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121910

--- Comment #5 from Zhongyao Chen <chenzhongyao.hit at gmail dot com> ---
I have doubts about the following code: 
Why does it return regno_alignment when the calculated lmul is greater than
RVV_M8? 

I change the return to RVV_M8, and then the issue disappeared, no register
spill. However, I'm unsure if the changes is appropriate. what you think?


@@ -632,7 +726,7 @@ compute_estimated_lmul (loop_vec_info loop_vinfo,
machine_mode m
ode)
       int estimated_lmul = estimated_vf * GET_MODE_BITSIZE (mode).to_constant
()
                           / TARGET_MIN_VLEN;
       if (estimated_lmul > RVV_M8)
-       return regno_alignment;
+       return RVV_M8;
       else
        return estimated_lmul;
     }