[Bug target/119100] RISC-V: missed opportunities for vector-scalar FMA instructions

[parras at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119100

Paul-Antoine Arras <parras at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #16 from Paul-Antoine Arras <parras at gcc dot gnu.org> ---
All the vector-scalar FMA instructions now have associated RTL patterns for the
combine and late-combine passes. The specific case of the vector-scalar vs.
zero-stride memory broadcast tradeoff is handled separately in PR121451.