[Bug target/121778] New: Improve rotation detection for RISC-V

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121778

            Bug ID: 121778
           Summary: Improve rotation detection for RISC-V
           Product: gcc
           Version: 16.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
  Target Milestone: ---

unsigned int
test_011 (unsigned int a, unsigned int b)
{
  return (a << 1) | ((a >> 31) ^ 1);
}

Seems like that's a rotate left by 1 bit position, then an inversion of the low
bit.  But we get this code using  -O2 -march=rv64gcbv_zicond j.c -mabi=lp64d

        srliw   a5,a0,31
        xori    a5,a5,1
        slliw   a0,a0,1
        or      a0,a0,a5


rotw+binv seems like the desired sequence here.