https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117818
--- Comment #11 from Steven Munroe <munroesj at gcc dot gnu.org> --- (In reply to Segher Boessenkool from comment #10) > Btw, from power10 on (arch 3.1 and later) vslq (and vsrq) are preferred :-) Noted. PVECLIB will generate these for #if defined(_ARCH_PWR10) https://munroesj52.github.io/vec__int128__ppc_8h.html#a070fe972995f3954362835f5b72e5ff6 https://munroesj52.github.io/vec__int128__ppc_8h.html#a0edd172a5656b842d6586c5078284942 But the same problems exist generating a shift constant to bits[57:63] as for bits [121:127]. Also the PVIPR seems to require the shift count in [121:127] and generates an xxswapd to put the shift count into [57:63] for vslq/vsrq.
