https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121623
--- Comment #5 from Frank Scheiner <frank.scheiner at web dot de> --- (In reply to Andrew Pinski from comment #4) > Note the main difference between stage 2 and 3 is with or without debugging > info. But for the comparison the results are stripped and the comparison happens for temporary files, yes? > The instruction scheduler in some cases messes up due to an extra insn due > to that. Sel scheduling is most likely issue too. How does it decide to place one store before the other if they are independent?
