https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121076
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2025-08-14
CC| |segher at gcc dot gnu.org
Ever confirmed|0 |1
Target|powerpc-*-*-* |powerpc*-*-*
--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed.
Try -mcpu=power9 if you want to see actual horrors:
mr 9,3
rlwinm 3,9,24,24,31
rlwinm 10,9,8,16,23
or 3,3,10
rlwinm 3,3,0,0xffff
blr
It is better with -mcpu=power10, since we now have a machine insn to do this,
but it is still not optimal:
brh 3,3
rlwinm 3,3,0,0xffff
blr
The zero-extend at the end is not necessary. brh does not do that itself
(many other insns do though), it reverses the order of every 16-bit part of
the register, instead. But the register already had the top 48 bits zeroed
out (the ABIs require that here), and zero is zero is zero, so it works fine
here without an extra zero-extend :-)
We could make zillions of extra patterns in the machine description for this,
and we already do have many, or we could finally do some (backend-specific?)
pass to fix this up. It is harder for the ABI-caused known-zero bits, that
one might be easiest to handle with an extra pattern, but who knows :-)
