[Bug target/121268] RISC-V: Possible optimization when manipulating rightmost bits with zbb enabled

[vineetg at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121268

Vineet Gupta <vineetg at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |vineetg at gcc dot gnu.org
           Assignee|unassigned at gcc dot gnu.org      |vineetg at gcc dot 
gnu.org

--- Comment #1 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
I have a colleague who wants to get started on gcc, picking this on their
behalf.