[Bug target/120986] ICE when expanding svdot_lane_fpm intrinsic with compile time know FPMR

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120986

--- Comment #10 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Alex Coplan <acop...@gcc.gnu.org>:

https://gcc.gnu.org/g:75eabf69d805b7effb5e50f0ed53f45d6a2f596a

commit r16-3079-g75eabf69d805b7effb5e50f0ed53f45d6a2f596a
Author: Alex Coplan <alex.cop...@arm.com>
Date:   Tue Jul 15 10:37:58 2025 +0100

    aarch64: Fix predication of FP8 FDOT insns [PR120986]

    The predication of the SVE2 FP8 dot product insns was relying on the
    architectural dependency:

    FEAT_FP8DOT2 => FEAT_FP8DOT4

    which was relaxed in GCC as of
    r15-7480-g299a8e2dc667e795991bc439d2cad5ea5bd379e2, thus leading to
    unrecognisable insn ICEs when compiling a two-way FDOT with just
    +fp8dot2.  This patch introduces a new mode iterator which selectively
    enables the appropriate mode(s) depending on which of the FP8DOT{2,4}
    features are available, and uses it to fix the predication of the
    patterns.

    gcc/ChangeLog:

            PR target/120986
            * config/aarch64/aarch64-sve2.md (@aarch64_sve_dot<mode>):
            Switch mode iterator from SVE_FULL_HSF to new iterator;
            remove insn predicate as this is now taken care of by conditions
            in the mode iterator.
            (@aarch64_sve_dot_lane<mode>): Likewise.
            * config/aarch64/iterators.md (SVE_FULL_HSF_FP8_FDOT): New.

    gcc/testsuite/ChangeLog:

            PR target/120986
            * gcc.target/aarch64/pr120986-1.c: New test.