https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121413
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> --- Ah, the problem is in the PHI INTEGER_CST argument expansion code on targets with GET_MODE_BITSIZE (info.abi_limb_mode) > GET_MODE_BITSIZE (info.limb_mode) like aarch64 (or in the near future loongarch and arm). While in other spots where we emit INTEGER_CSTs with smaller precision into rodata and then extend the extension is done properly through extending just the limbs beyond the precision of the chosen _BitInt type (with precision in multiplies of limb_prec), in the PHI argument case it is done by copying the whole c and clearing the rest (or memset to -1). Now, in this particular case min_prec is ~ 408ish, and as limb_prec is 64, we choose 7*64 = 448 bits for c. Except on aarch64 that contains 64bits of padding and when we copy the whole c, we copy also the 64 bits of padding from there (and only for higher bits memset it to -1). Either we'd need to carefully copy only the 7 limbs rather than whole c and memset the rest, or IMHO when we in rodata allocate 8 limbs anyway, it might be easier to just use 512 bits for c with no padding in there.
